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authorLiu Gang <Gang.Liu@freescale.com>2013-03-07 22:41:02 +0000
committerAndy Fleming <afleming@freescale.com>2013-05-02 16:56:44 -0500
commit57966101c827fcfa215aedee59f0e5aa558b7604 (patch)
tree0775b1bd38a347f78d45faba526ac8486a09ad78 /board/dbau1x00
parentc5729f0b1fb8777c5dcfd2e510bc351045e9b1c4 (diff)
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powerpc/b4860qds: Add the tlb entries for SRIO interfaces
Add the tlb entries based on the configuration of the SRIO interfaces. Every SRIO interface has 256M space: #define CONFIG_SYS_SRIO1_MEM_VIRT 0xa0000000 #define CONFIG_SYS_SRIO1_MEM_PHYS 0xc20000000ull #define CONFIG_SYS_SRIO2_MEM_VIRT 0xb0000000 #define CONFIG_SYS_SRIO2_MEM_PHYS 0xc30000000ull Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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