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authorMarkus Klotzbuecher <mk@denx.de>2008-07-10 10:26:07 +0200
committerMarkus Klotzbuecher <mk@denx.de>2008-07-10 10:26:07 +0200
commit794a5924972fc8073616e98a2668da4a5f9aea90 (patch)
treedd0db39b3e183b5bcb0300d5377d7a0d5ac5fd0c /board/davinci
parentf2aeecc320f5b181b30effcaa67683aec8d5a843 (diff)
parent4188f0491886b3b486164e819c0a83fdb97efd7d (diff)
downloadu-boot-imx-794a5924972fc8073616e98a2668da4a5f9aea90.zip
u-boot-imx-794a5924972fc8073616e98a2668da4a5f9aea90.tar.gz
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Merge branch 'master' of git://www.denx.de/git/u-boot
Diffstat (limited to 'board/davinci')
-rw-r--r--board/davinci/dv-evm/Makefile2
-rw-r--r--board/davinci/schmoogie/Makefile2
-rw-r--r--board/davinci/sffsdr/Makefile52
-rw-r--r--board/davinci/sffsdr/board_init.S29
-rw-r--r--board/davinci/sffsdr/config.mk23
-rw-r--r--board/davinci/sffsdr/sffsdr.c310
-rw-r--r--board/davinci/sffsdr/u-boot.lds52
-rw-r--r--board/davinci/sonata/Makefile2
8 files changed, 469 insertions, 3 deletions
diff --git a/board/davinci/dv-evm/Makefile b/board/davinci/dv-evm/Makefile
index fa00138..579efe2 100644
--- a/board/davinci/dv-evm/Makefile
+++ b/board/davinci/dv-evm/Makefile
@@ -41,7 +41,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak *~ .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# This is for $(obj).depend target
diff --git a/board/davinci/schmoogie/Makefile b/board/davinci/schmoogie/Makefile
index fa00138..579efe2 100644
--- a/board/davinci/schmoogie/Makefile
+++ b/board/davinci/schmoogie/Makefile
@@ -41,7 +41,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak *~ .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# This is for $(obj).depend target
diff --git a/board/davinci/sffsdr/Makefile b/board/davinci/sffsdr/Makefile
new file mode 100644
index 0000000..fb31ee4
--- /dev/null
+++ b/board/davinci/sffsdr/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o
+SOBJS := board_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/davinci/sffsdr/board_init.S b/board/davinci/sffsdr/board_init.S
new file mode 100644
index 0000000..22d8adc
--- /dev/null
+++ b/board/davinci/sffsdr/board_init.S
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Board-specific low level initialization code. Called at the very end
+ * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
+ * initialization required.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+.globl dv_board_init
+dv_board_init:
+
+ mov pc, lr
diff --git a/board/davinci/sffsdr/config.mk b/board/davinci/sffsdr/config.mk
new file mode 100644
index 0000000..f3b23d1
--- /dev/null
+++ b/board/davinci/sffsdr/config.mk
@@ -0,0 +1,23 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+#
+# Copyright (C) 2008 Lyrtech <www.lyrtech.com>
+# Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
+#
+# Lyrtech SFF SDR board (ARM926EJS) cpu
+#
+# SFF SDR board has 1 bank of 128 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 87FF'FFFF
+#
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+#
+# Integrity kernel is expected to be at 8000'0000, entry 8000'00D0,
+# up to 81FF'FFFF (uses up to 32 MB of memory for text, heap, etc).
+#
+# we load ourself to 8400'0000 to provide at least 32MB spacing
+# between us and the Integrity kernel image
+TEXT_BASE = 0x84000000
diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c
new file mode 100644
index 0000000..b73484a
--- /dev/null
+++ b/board/davinci/sffsdr/sffsdr.c
@@ -0,0 +1,310 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
+ * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com>
+ *
+ * Parts are shamelessly stolen from various TI sources, original copyright
+ * follows:
+ *
+ * Copyright (C) 2004 Texas Instruments.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/emac_defs.h>
+
+#define DAVINCI_A3CR (0x01E00014) /* EMIF-A CS3 config register. */
+#define DAVINCI_A3CR_VAL (0x3FFFFFFD) /* EMIF-A CS3 value for FPGA. */
+
+#define INTEGRITY_SYSCFG_OFFSET 0x7E8
+#define INTEGRITY_CHECKWORD_OFFSET 0x7F8
+#define INTEGRITY_CHECKWORD_VALUE 0x10ADBEEF
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void timer_init(void);
+extern int eth_hw_init(void);
+extern phy_t phy;
+
+
+/* Works on Always On power domain only (no PD argument) */
+void lpsc_on(unsigned int id)
+{
+ dv_reg_p mdstat, mdctl;
+
+ if (id >= DAVINCI_LPSC_GEM)
+ return; /* Don't work on DSP Power Domain */
+
+ mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
+ mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
+
+ while (REG(PSC_PTSTAT) & 0x01);
+
+ if ((*mdstat & 0x1f) == 0x03)
+ return; /* Already on and enabled */
+
+ *mdctl |= 0x03;
+
+ /* Special treatment for some modules as for sprue14 p.7.4.2 */
+ switch (id) {
+ case DAVINCI_LPSC_VPSSSLV:
+ case DAVINCI_LPSC_EMAC:
+ case DAVINCI_LPSC_EMAC_WRAPPER:
+ case DAVINCI_LPSC_MDIO:
+ case DAVINCI_LPSC_USB:
+ case DAVINCI_LPSC_ATA:
+ case DAVINCI_LPSC_VLYNQ:
+ case DAVINCI_LPSC_UHPI:
+ case DAVINCI_LPSC_DDR_EMIF:
+ case DAVINCI_LPSC_AEMIF:
+ case DAVINCI_LPSC_MMC_SD:
+ case DAVINCI_LPSC_MEMSTICK:
+ case DAVINCI_LPSC_McBSP:
+ case DAVINCI_LPSC_GPIO:
+ *mdctl |= 0x200;
+ break;
+ }
+
+ REG(PSC_PTCMD) = 0x01;
+
+ while (REG(PSC_PTSTAT) & 0x03);
+ while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */
+}
+
+#if !defined(CFG_USE_DSPLINK)
+void dsp_on(void)
+{
+ int i;
+
+ if (REG(PSC_PDSTAT1) & 0x1f)
+ return; /* Already on */
+
+ REG(PSC_GBLCTL) |= 0x01;
+ REG(PSC_PDCTL1) |= 0x01;
+ REG(PSC_PDCTL1) &= ~0x100;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
+ REG(PSC_PTCMD) = 0x02;
+
+ for (i = 0; i < 100; i++) {
+ if (REG(PSC_EPCPR) & 0x02)
+ break;
+ }
+
+ REG(PSC_CHP_SHRTSW) = 0x01;
+ REG(PSC_PDCTL1) |= 0x100;
+ REG(PSC_EPCCR) = 0x02;
+
+ for (i = 0; i < 100; i++) {
+ if (!(REG(PSC_PTSTAT) & 0x02))
+ break;
+ }
+
+ REG(PSC_GBLCTL) &= ~0x1f;
+}
+#endif /* CFG_USE_DSPLINK */
+
+int board_init(void)
+{
+ /* arch number of the board */
+ gd->bd->bi_arch_number = MACH_TYPE_SFFSDR;
+
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+ /* Workaround for TMS320DM6446 errata 1.3.22 */
+ REG(PSC_SILVER_BULLET) = 0;
+
+ /* Power on required peripherals */
+ lpsc_on(DAVINCI_LPSC_EMAC);
+ lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
+ lpsc_on(DAVINCI_LPSC_MDIO);
+ lpsc_on(DAVINCI_LPSC_I2C);
+ lpsc_on(DAVINCI_LPSC_UART0);
+ lpsc_on(DAVINCI_LPSC_TIMER1);
+ lpsc_on(DAVINCI_LPSC_GPIO);
+
+#if !defined(CFG_USE_DSPLINK)
+ /* Powerup the DSP */
+ dsp_on();
+#endif /* CFG_USE_DSPLINK */
+
+ /* Bringup UART0 out of reset */
+ REG(UART0_PWREMU_MGMT) = 0x0000e003;
+
+ /* Enable GIO3.3V cells used for EMAC */
+ REG(VDD3P3V_PWDN) = 0;
+
+ /* Enable UART0 MUX lines */
+ REG(PINMUX1) |= 1;
+
+ /* Enable EMAC and AEMIF pins */
+ REG(PINMUX0) = 0x80000c1f;
+
+ /* Enable I2C pin Mux */
+ REG(PINMUX1) |= (1 << 7);
+
+ /* Set the Bus Priority Register to appropriate value */
+ REG(VBPR) = 0x20;
+
+ timer_init();
+
+ return(0);
+}
+
+/* Read ethernet MAC address from Integrity data structure inside EEPROM. */
+int read_mac_address(uint8_t *buf)
+{
+ u_int32_t value, mac[2], address;
+
+ /* Read Integrity data structure checkword. */
+ if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_CHECKWORD_OFFSET,
+ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
+ goto err;
+ if (value != INTEGRITY_CHECKWORD_VALUE)
+ return 1;
+
+ /* Read SYSCFG structure offset. */
+ if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET,
+ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
+ goto err;
+ address = 0x800 + (int) value; /* Address of SYSCFG structure. */
+
+ /* Read NET CONFIG structure offset. */
+ if (i2c_read(CFG_I2C_EEPROM_ADDR, address,
+ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
+ goto err;
+ address = 0x800 + (int) value; /* Address of NET CONFIG structure. */
+ address += 12; /* Address of NET INTERFACE CONFIG structure. */
+
+ /* Read NET INTERFACE CONFIG 2 structure offset. */
+ if (i2c_read(CFG_I2C_EEPROM_ADDR, address,
+ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
+ goto err;
+ address = 0x800 + 16 + (int) value; /* Address of NET INTERFACE
+ * CONFIG 2 structure. */
+
+ /* Read MAC address. */
+ if (i2c_read(CFG_I2C_EEPROM_ADDR, address,
+ CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &mac[0], 8))
+ goto err;
+
+ buf[0] = mac[0] >> 24;
+ buf[1] = mac[0] >> 16;
+ buf[2] = mac[0] >> 8;
+ buf[3] = mac[0];
+ buf[4] = mac[1] >> 24;
+ buf[5] = mac[1] >> 16;
+
+ return 0;
+
+err:
+ printf("Read from EEPROM @ 0x%02x failed\n", CFG_I2C_EEPROM_ADDR);
+ return 1;
+}
+
+/* Platform dependent initialisation. */
+int misc_init_r(void)
+{
+ int i;
+ u_int8_t i2cbuf;
+ u_int8_t env_enetaddr[6], eeprom_enetaddr[6];
+ char *tmp = getenv("ethaddr");
+ char *end;
+ int clk;
+
+ /* EMIF-A CS3 configuration for FPGA. */
+ REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL;
+
+ clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
+
+ printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2);
+ printf("DDR Clock: %dMHz\n", (clk / 2));
+
+ /* Configure I2C switch (PCA9543) to enable channel 0. */
+ i2cbuf = CFG_I2C_PCA9543_ENABLE_CH0;
+ if (i2c_write(CFG_I2C_PCA9543_ADDR, 0,
+ CFG_I2C_PCA9543_ADDR_LEN, &i2cbuf, 1)) {
+ printf("Write to MUX @ 0x%02x failed\n", CFG_I2C_PCA9543_ADDR);
+ return 1;
+ }
+
+ /* Read Ethernet MAC address from the U-Boot environment. */
+ for (i = 0; i < 6; i++) {
+ env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
+ if (tmp)
+ tmp = (*end) ? end+1 : end;
+ }
+
+ /* Read Ethernet MAC address from EEPROM. */
+ if (read_mac_address(eeprom_enetaddr) == 0) {
+ if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 &&
+ memcmp(env_enetaddr, eeprom_enetaddr, 6) != 0) {
+ printf("\nWarning: MAC addresses don't match:\n");
+ printf("\tHW MAC address: "
+ "%02X:%02X:%02X:%02X:%02X:%02X\n",
+ eeprom_enetaddr[0], eeprom_enetaddr[1],
+ eeprom_enetaddr[2], eeprom_enetaddr[3],
+ eeprom_enetaddr[4], eeprom_enetaddr[5]);
+ printf("\t\"ethaddr\" value: "
+ "%02X:%02X:%02X:%02X:%02X:%02X\n",
+ env_enetaddr[0], env_enetaddr[1],
+ env_enetaddr[2], env_enetaddr[3],
+ env_enetaddr[4], env_enetaddr[5]) ;
+ debug("### Set MAC addr from environment\n");
+ memcpy(eeprom_enetaddr, env_enetaddr, 6);
+ }
+ if (!tmp) {
+ char ethaddr[20];
+
+ sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
+ eeprom_enetaddr[0], eeprom_enetaddr[1],
+ eeprom_enetaddr[2], eeprom_enetaddr[3],
+ eeprom_enetaddr[4], eeprom_enetaddr[5]) ;
+ debug("### Set environment from HW MAC addr = \"%s\"\n",
+ ethaddr);
+ setenv("ethaddr", ethaddr);
+ }
+ }
+
+ if (!eth_hw_init()) {
+ printf("Ethernet init failed\n");
+ } else {
+ printf("ETH PHY: %s\n", phy.name);
+ }
+
+ /* On this platform, U-Boot is copied in RAM by the UBL,
+ * so we are always in the relocated state. */
+ gd->flags |= GD_FLG_RELOC;
+
+ return(0);
+}
+
+int dram_init(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return(0);
+}
diff --git a/board/davinci/sffsdr/u-boot.lds b/board/davinci/sffsdr/u-boot.lds
new file mode 100644
index 0000000..a4fcd1a
--- /dev/null
+++ b/board/davinci/sffsdr/u-boot.lds
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm926ejs/start.o (.text)
+ *(.text)
+ }
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+ . = ALIGN(4);
+ .data : { *(.data) }
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss (NOLOAD) : { *(.bss) }
+ _end = .;
+}
diff --git a/board/davinci/sonata/Makefile b/board/davinci/sonata/Makefile
index fa00138..579efe2 100644
--- a/board/davinci/sonata/Makefile
+++ b/board/davinci/sonata/Makefile
@@ -41,7 +41,7 @@ clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak *~ .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# This is for $(obj).depend target