Merge git://www.denx.de/git/u-boot

Conflicts:

	CREDITS

5 files changed, 449 insertions, 0 deletions

diff --git a/board/davinci/sonata/Makefile b/board/davinci/sonata/Makefile
new file mode 100644
index 0000000..fa00138
--- /dev/null
+++ b/board/davinci/sonata/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).a
+
+COBJS	:= dv_board.o
+SOBJS	:= board_init.o
+
+SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS	:= $(addprefix $(obj),$(COBJS))
+SOBJS	:= $(addprefix $(obj),$(SOBJS))
+
+$(LIB):	$(obj).depend $(OBJS) $(SOBJS)
+	$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak *~ .depend
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/davinci/sonata/board_init.S b/board/davinci/sonata/board_init.S
new file mode 100644
index 0000000..fbb9ea7
--- /dev/null
+++ b/board/davinci/sonata/board_init.S
@@ -0,0 +1,100 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Board-specific low level initialization code. Called at the very end
+ * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
+ * initialization required.
+ *
+ * For _OLDER_ Sonata boards sets up GPIO4 to control NAND WP line. Newer
+ * Sonata boards, AFAIK, don't use this so it's just return by default. Ask
+ * Visioneering if they reinvented the wheel once again to make sure :)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+.globl	dv_board_init
+dv_board_init:
+#ifdef SONATA_BOARD_GPIOWP
+	/* Set PINMUX0 to enable GPIO4 */
+	ldr	r0, _PINMUX0
+	ldr	r1, GPIO4_EN_MASK
+	ldr	r2, [r0]
+	and	r2, r2, r1
+	str	r2, [r0]
+
+	/* Enable GPIO LPSC module */
+	ldr	r0, PTSTAT
+
+gpio_ptstat_loop1:
+	ldr	r2, [r0]
+	tst	r2, $0x00000001
+	bne	gpio_ptstat_loop1
+
+	ldr	r1, MDCTL_GPIO
+	ldr	r2, [r1]
+	and	r2, r2, $0xfffffff8
+	orr	r2, r2, $0x00000003
+	str	r2, [r1]
+
+	orr	r2, r2, $0x00000200
+	str	r2, [r1]
+
+	ldr	r1, PTCMD
+	mov	r2, $0x00000001
+	str	r2, [r1]
+
+gpio_ptstat_loop2:
+	ldr	r2, [r0]
+	tst	r2, $0x00000001
+	bne	gpio_ptstat_loop2
+
+	ldr	r0, MDSTAT_GPIO
+gpio_mdstat_loop:
+	ldr	r2, [r0]
+	and	r2, r2, $0x0000001f
+	teq	r2, $0x00000003
+	bne	gpio_mdstat_loop
+
+	/* GPIO4 -> output */
+	ldr	r0, GPIO_DIR01
+	mov	r1, $0x10
+	ldr	r2, [r0]
+	bic	r2, r2, r0
+	str	r2, [r0]
+
+	/* Set it to 0 (Write Protect) */
+	ldr	r0, GPIO_CLR_DATA01
+	str	r1, [r0]
+#endif
+
+	mov	pc, lr
+
+#ifdef SONATA_BOARD_GPIOWP
+.ltorg
+
+GPIO4_EN_MASK:
+	.word	0xf77fffff
+MDCTL_GPIO:
+	.word	0x01c41a68
+MDSTAT_GPIO:
+	.word	0x01c41868
+GPIO_DIR01:
+	.word	0x01c67010
+GPIO_CLR_DATA01:
+	.word	0x01c6701c
+#endif
diff --git a/board/davinci/sonata/config.mk b/board/davinci/sonata/config.mk
new file mode 100644
index 0000000..aa89d0e
--- /dev/null
+++ b/board/davinci/sonata/config.mk
@@ -0,0 +1,39 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+#
+# (C) Copyright 2003
+# Texas Instruments, <www.ti.com>
+# Swaminathan <swami.iyer@ti.com>
+#
+# Davinci EVM board (ARM925EJS) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# Davinci EVM has 1 bank of 256 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 9000'0000
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# Visioneering Corp. Sonata board (ARM926EJS) cpu
+#
+# Sonata board has 1 bank of 128 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 8800'0000
+#
+# Razorstream, LLC. SCHMOOGIE board (ARM926EJS) cpu
+#
+# Schmoogie board has 1 bank of 128 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 8800'0000
+#
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+#
+# we load ourself to 8108 '0000
+#
+#
+
+#Provide at least 16MB spacing between us and the Linux Kernel image
+TEXT_BASE = 0x81080000
diff --git a/board/davinci/sonata/dv_board.c b/board/davinci/sonata/dv_board.c
new file mode 100644
index 0000000..cd2dac6
--- /dev/null
+++ b/board/davinci/sonata/dv_board.c
@@ -0,0 +1,206 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Parts are shamelessly stolen from various TI sources, original copyright
+ * follows:
+ * -----------------------------------------------------------------
+ *
+ * Copyright (C) 2004 Texas Instruments.
+ *
+ * ----------------------------------------------------------------------------
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * ----------------------------------------------------------------------------
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/emac_defs.h>
+
+#define MACH_TYPE_SONATA		1254
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void	i2c_init(int speed, int slaveaddr);
+extern void	timer_init(void);
+extern int	eth_hw_init(void);
+extern phy_t	phy;
+
+
+/* Works on Always On power domain only (no PD argument) */
+void lpsc_on(unsigned int id)
+{
+	dv_reg_p	mdstat, mdctl;
+
+	if (id >= DAVINCI_LPSC_GEM)
+		return;			/* Don't work on DSP Power Domain */
+
+	mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
+	mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
+
+	while (REG(PSC_PTSTAT) & 0x01) {;}
+
+	if ((*mdstat & 0x1f) == 0x03)
+		return;			/* Already on and enabled */
+
+	*mdctl |= 0x03;
+
+	/* Special treatment for some modules as for sprue14 p.7.4.2 */
+	if (	(id == DAVINCI_LPSC_VPSSSLV) ||
+		(id == DAVINCI_LPSC_EMAC) ||
+		(id == DAVINCI_LPSC_EMAC_WRAPPER) ||
+		(id == DAVINCI_LPSC_MDIO) ||
+		(id == DAVINCI_LPSC_USB) ||
+		(id == DAVINCI_LPSC_ATA) ||
+		(id == DAVINCI_LPSC_VLYNQ) ||
+		(id == DAVINCI_LPSC_UHPI) ||
+		(id == DAVINCI_LPSC_DDR_EMIF) ||
+		(id == DAVINCI_LPSC_AEMIF) ||
+		(id == DAVINCI_LPSC_MMC_SD) ||
+		(id == DAVINCI_LPSC_MEMSTICK) ||
+		(id == DAVINCI_LPSC_McBSP) ||
+		(id == DAVINCI_LPSC_GPIO)
+	   )
+	   	*mdctl |= 0x200;
+
+	REG(PSC_PTCMD) = 0x01;
+
+	while (REG(PSC_PTSTAT) & 0x03) {;}
+	while ((*mdstat & 0x1f) != 0x03) {;}	/* Probably an overkill... */
+}
+
+void dsp_on(void)
+{
+	int	i;
+
+	if (REG(PSC_PDSTAT1) & 0x1f)
+		return;			/* Already on */
+
+	REG(PSC_GBLCTL) |= 0x01;
+	REG(PSC_PDCTL1) |= 0x01;
+	REG(PSC_PDCTL1) &= ~0x100;
+	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
+	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
+	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
+	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
+	REG(PSC_PTCMD) = 0x02;
+
+	for (i = 0; i < 100; i++) {
+		if (REG(PSC_EPCPR) & 0x02)
+			break;
+	}
+
+	REG(PSC_CHP_SHRTSW) = 0x01;
+	REG(PSC_PDCTL1) |= 0x100;
+	REG(PSC_EPCCR) = 0x02;
+
+	for (i = 0; i < 100; i++) {
+		if (!(REG(PSC_PTSTAT) & 0x02))
+			break;
+	}
+
+	REG(PSC_GBLCTL) &= ~0x1f;
+}
+
+
+int board_init(void)
+{
+	/* arch number of the board */
+	gd->bd->bi_arch_number = MACH_TYPE_SONATA;
+
+	/* address of boot parameters */
+	gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+	/* Workaround for TMS320DM6446 errata 1.3.22 */
+	REG(PSC_SILVER_BULLET) = 0;
+
+	/* Power on required peripherals */
+	lpsc_on(DAVINCI_LPSC_EMAC);
+	lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
+	lpsc_on(DAVINCI_LPSC_MDIO);
+	lpsc_on(DAVINCI_LPSC_I2C);
+	lpsc_on(DAVINCI_LPSC_UART0);
+	lpsc_on(DAVINCI_LPSC_TIMER1);
+	lpsc_on(DAVINCI_LPSC_GPIO);
+
+	/* Powerup the DSP */
+	dsp_on();
+
+	/* Bringup UART0 out of reset */
+	REG(UART0_PWREMU_MGMT) = 0x0000e003;
+
+	/* Enable GIO3.3V cells used for EMAC */
+	REG(VDD3P3V_PWDN) = 0;
+
+	/* Enable UART0 MUX lines */
+	REG(PINMUX1) |= 1;
+
+	/* Enable EMAC and AEMIF pins */
+	REG(PINMUX0) = 0x80000c1f;
+
+	/* Enable I2C pin Mux */
+	REG(PINMUX1) |= (1 << 7);
+
+	/* Set the Bus Priority Register to appropriate value */
+	REG(VBPR) = 0x20;
+
+	timer_init();
+
+	return(0);
+}
+
+int misc_init_r (void)
+{
+	u_int8_t	tmp[20], buf[10];
+	int		i = 0;
+	int		clk = 0;
+
+
+	clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
+
+	printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2);
+	printf ("DDR Clock : %dMHz\n", (clk / 2));
+
+	/* Set Ethernet MAC address from EEPROM */
+	if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7f00, CFG_I2C_EEPROM_ADDR_LEN, buf, 6)) {
+		printf("\nEEPROM @ 0x%02x read FAILED!!!\n", CFG_I2C_EEPROM_ADDR);
+	} else {
+		tmp[0] = 0xff;
+		for (i = 0; i < 6; i++)
+			tmp[0] &= buf[i];
+
+		if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) {
+			sprintf((char *)&tmp[0], "%02x:%02x:%02x:%02x:%02x:%02x",
+				buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
+			setenv("ethaddr", (char *)&tmp[0]);
+		}
+	}
+
+	if (!eth_hw_init()) {
+		printf("ethernet init failed!\n");
+	} else {
+		printf("ETH PHY   : %s\n", phy.name);
+	}
+
+	return(0);
+}
+
+int dram_init(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+	return(0);
+}
diff --git a/board/davinci/sonata/u-boot.lds b/board/davinci/sonata/u-boot.lds
new file mode 100644
index 0000000..710b2a2
--- /dev/null
+++ b/board/davinci/sonata/u-boot.lds
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+	. = ALIGN(4);
+	.text	:
+	{
+	  cpu/arm926ejs/start.o	(.text)
+	  *(.text)
+	}
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+	. = ALIGN(4);
+	.data : { *(.data) }
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	. = .;
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}