ARM DaVinci: Move common functions to board/davinci/common

ARM DaVinci: Move common functions to board/davinci/common.

Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>

1 files changed, 15 insertions, 143 deletions

diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c
index f41081f..f47ba0f 100644
--- a/board/davinci/sffsdr/sffsdr.c
+++ b/board/davinci/sffsdr/sffsdr.c
@@ -31,6 +31,8 @@
 #include <i2c.h>
 #include <asm/arch/hardware.h>
 #include <asm/arch/emac_defs.h>
+#include "../common/psc.h"
+#include "../common/misc.h"
 
 #define DAVINCI_A3CR     (0x01E00014)	/* EMIF-A CS3 config register. */
 #define DAVINCI_A3CR_VAL (0x3FFFFFFD)	/* EMIF-A CS3 value for FPGA. */
@@ -41,89 +43,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-extern void timer_init(void);
-extern int eth_hw_init(void);
-
-
-/* Works on Always On power domain only (no PD argument) */
-void lpsc_on(unsigned int id)
-{
-	dv_reg_p mdstat, mdctl;
-
-	if (id >= DAVINCI_LPSC_GEM)
-		return;			/* Don't work on DSP Power Domain */
-
-	mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
-	mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
-
-	while (REG(PSC_PTSTAT) & 0x01);
-
-	if ((*mdstat & 0x1f) == 0x03)
-		return;			/* Already on and enabled */
-
-	*mdctl |= 0x03;
-
-	/* Special treatment for some modules as for sprue14 p.7.4.2 */
-	switch (id) {
-	case DAVINCI_LPSC_VPSSSLV:
-	case DAVINCI_LPSC_EMAC:
-	case DAVINCI_LPSC_EMAC_WRAPPER:
-	case DAVINCI_LPSC_MDIO:
-	case DAVINCI_LPSC_USB:
-	case DAVINCI_LPSC_ATA:
-	case DAVINCI_LPSC_VLYNQ:
-	case DAVINCI_LPSC_UHPI:
-	case DAVINCI_LPSC_DDR_EMIF:
-	case DAVINCI_LPSC_AEMIF:
-	case DAVINCI_LPSC_MMC_SD:
-	case DAVINCI_LPSC_MEMSTICK:
-	case DAVINCI_LPSC_McBSP:
-	case DAVINCI_LPSC_GPIO:
-		*mdctl |= 0x200;
-		break;
-	}
-
-	REG(PSC_PTCMD) = 0x01;
-
-	while (REG(PSC_PTSTAT) & 0x03);
-	while ((*mdstat & 0x1f) != 0x03);	/* Probably an overkill... */
-}
-
-#if !defined(CFG_USE_DSPLINK)
-void dsp_on(void)
-{
-	int i;
-
-	if (REG(PSC_PDSTAT1) & 0x1f)
-		return;			/* Already on */
-
-	REG(PSC_GBLCTL) |= 0x01;
-	REG(PSC_PDCTL1) |= 0x01;
-	REG(PSC_PDCTL1) &= ~0x100;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
-	REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
-	REG(PSC_PTCMD) = 0x02;
-
-	for (i = 0; i < 100; i++) {
-		if (REG(PSC_EPCPR) & 0x02)
-			break;
-	}
-
-	REG(PSC_CHP_SHRTSW) = 0x01;
-	REG(PSC_PDCTL1) |= 0x100;
-	REG(PSC_EPCCR) = 0x02;
-
-	for (i = 0; i < 100; i++) {
-		if (!(REG(PSC_PTSTAT) & 0x02))
-			break;
-	}
-
-	REG(PSC_GBLCTL) &= ~0x1f;
-}
-#endif /* CFG_USE_DSPLINK */
-
 int board_init(void)
 {
 	/* arch number of the board */
@@ -172,8 +91,10 @@ int board_init(void)
 	return(0);
 }
 
-/* Read ethernet MAC address from Integrity data structure inside EEPROM. */
-int read_mac_address(uint8_t *buf)
+/* Read ethernet MAC address from Integrity data structure inside EEPROM.
+ * Returns 1 if found, 0 otherwise.
+ */
+static int sffsdr_read_mac_address(uint8_t *buf)
 {
 	u_int32_t value, mac[2], address;
 
@@ -182,7 +103,7 @@ int read_mac_address(uint8_t *buf)
 		     CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4))
 		goto err;
 	if (value != INTEGRITY_CHECKWORD_VALUE)
-		return 1;
+		return 0;
 
 	/* Read SYSCFG structure offset. */
 	if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET,
@@ -216,30 +137,23 @@ int read_mac_address(uint8_t *buf)
 	buf[4] = mac[1] >> 24;
 	buf[5] = mac[1] >> 16;
 
-	return 0;
+	return 1; /* Found */
 
 err:
 	printf("Read from EEPROM @ 0x%02x failed\n", CFG_I2C_EEPROM_ADDR);
-	return 1;
+	return 0;
 }
 
 /* Platform dependent initialisation. */
 int misc_init_r(void)
 {
-	int i;
-	u_int8_t i2cbuf;
-	u_int8_t env_enetaddr[6], eeprom_enetaddr[6];
-	char *tmp = getenv("ethaddr");
-	char *end;
-	int clk;
+	uint8_t i2cbuf;
+	uint8_t eeprom_enetaddr[6];
 
 	/* EMIF-A CS3 configuration for FPGA. */
 	REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL;
 
-	clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
-
-	printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2);
-	printf("DDR Clock: %dMHz\n", (clk / 2));
+	dv_display_clk_infos();
 
 	/* Configure I2C switch (PCA9543) to enable channel 0. */
 	i2cbuf = CFG_I2C_PCA9543_ENABLE_CH0;
@@ -249,43 +163,9 @@ int misc_init_r(void)
 		return 1;
 	}
 
-	/* Read Ethernet MAC address from the U-Boot environment. */
-	for (i = 0; i < 6; i++) {
-		env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
-		if (tmp)
-			tmp = (*end) ? end+1 : end;
-	}
-
-	/* Read Ethernet MAC address from EEPROM. */
-	if (read_mac_address(eeprom_enetaddr) == 0) {
-		if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 &&
-		    memcmp(env_enetaddr, eeprom_enetaddr, 6) != 0) {
-			printf("\nWarning: MAC addresses don't match:\n");
-			printf("\tHW MAC address:  "
-			       "%02X:%02X:%02X:%02X:%02X:%02X\n",
-			       eeprom_enetaddr[0], eeprom_enetaddr[1],
-			       eeprom_enetaddr[2], eeprom_enetaddr[3],
-			       eeprom_enetaddr[4], eeprom_enetaddr[5]);
-			printf("\t\"ethaddr\" value: "
-			       "%02X:%02X:%02X:%02X:%02X:%02X\n",
-			       env_enetaddr[0], env_enetaddr[1],
-			       env_enetaddr[2], env_enetaddr[3],
-			       env_enetaddr[4], env_enetaddr[5]) ;
-			debug("### Set MAC addr from environment\n");
-			memcpy(eeprom_enetaddr, env_enetaddr, 6);
-		}
-		if (!tmp) {
-			char ethaddr[20];
-
-			sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
-				eeprom_enetaddr[0], eeprom_enetaddr[1],
-				eeprom_enetaddr[2], eeprom_enetaddr[3],
-				eeprom_enetaddr[4], eeprom_enetaddr[5]) ;
-			debug("### Set environment from HW MAC addr = \"%s\"\n",
-			      ethaddr);
-			setenv("ethaddr", ethaddr);
-		}
-	}
+	/* Read Ethernet MAC address from EEPROM if available. */
+	if (sffsdr_read_mac_address(eeprom_enetaddr))
+		dv_configure_mac_address(eeprom_enetaddr);
 
 	if (!eth_hw_init())
 		printf("Ethernet init failed\n");
@@ -296,11 +176,3 @@ int misc_init_r(void)
 
 	return(0);
 }
-
-int dram_init(void)
-{
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-
-	return(0);
-}