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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-05-15 23:47:12 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2009-06-12 20:39:49 +0200 |
| commit | 7a4f511b59f08f51dde4ceacbd45f49b8bf2a5cc (patch) | |
| tree | 6080253e837c7f4f79f662a51ab1fe5d13448423 /board/davinci/sffsdr/sffsdr.c | |
| parent | daea928829098cae3c9ec6b801e52ba616725034 (diff) | |
| download | u-boot-imx-7a4f511b59f08f51dde4ceacbd45f49b8bf2a5cc.zip u-boot-imx-7a4f511b59f08f51dde4ceacbd45f49b8bf2a5cc.tar.gz u-boot-imx-7a4f511b59f08f51dde4ceacbd45f49b8bf2a5cc.tar.bz2 | |
davinci: display correct clock info
Move the clock-rate dumping code into the cpu/.../davinci area
where it should have been, enabled by CONFIG_DISPLAY_CPUINFO,
updating the format and showing the DSP clock (where relevant).
Switch boards to use the cpuinfo() hook for this stuff.
Remove a few now-obsolete PLL #defines.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'board/davinci/sffsdr/sffsdr.c')
| -rw-r--r-- | board/davinci/sffsdr/sffsdr.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c index 7d855fb..7f4ee36 100644 --- a/board/davinci/sffsdr/sffsdr.c +++ b/board/davinci/sffsdr/sffsdr.c @@ -131,8 +131,6 @@ int misc_init_r(void) /* EMIF-A CS3 configuration for FPGA. */ REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL; - dv_display_clk_infos(); - /* Configure I2C switch (PCA9543) to enable channel 0. */ i2cbuf = CONFIG_SYS_I2C_PCA9543_ENABLE_CH0; if (i2c_write(CONFIG_SYS_I2C_PCA9543_ADDR, 0, |