diff options
author | Sekhar Nori <nsekhar@ti.com> | 2010-11-19 11:39:48 -0500 |
---|---|---|
committer | Sandeep Paulraj <s-paulraj@ti.com> | 2010-11-19 16:29:11 -0500 |
commit | 4f6fc15b42776b12244af8aa28da42c8e6497742 (patch) | |
tree | d519b49be27078d26e873d21f0015fcec982e634 /board/davinci/da8xxevm/da850evm.c | |
parent | 718f746427b6eb4b9e38a9562e689a268cd65b35 (diff) | |
download | u-boot-imx-4f6fc15b42776b12244af8aa28da42c8e6497742.zip u-boot-imx-4f6fc15b42776b12244af8aa28da42c8e6497742.tar.gz u-boot-imx-4f6fc15b42776b12244af8aa28da42c8e6497742.tar.bz2 |
DA850 EVM: passing maximum clock rate information to kernel
The TI DA850/OMAP-L138/AM18x EVM can be populated with devices
having different maximum allowed CPU clock rating.
The maximum clock the chip can support can only be determined from
the label on the package (not software readable).
Introduce a method to pass the maximum allowed clock rate information
to kernel using ATAG_REVISION. The kernel uses this information to
determine the maximum cpu clock rate reachable using cpufreq.
Note that U-Boot itself does not set the CPU clock rate. The CPU
clock is setup by a primary bootloader ("UBL"). The rate setup by
UBL could be different from the maximum clock rate supported by the
device.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'board/davinci/da8xxevm/da850evm.c')
-rw-r--r-- | board/davinci/da8xxevm/da850evm.c | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c index c8c5e1b..c3267cb 100644 --- a/board/davinci/da8xxevm/da850evm.c +++ b/board/davinci/da8xxevm/da850evm.c @@ -118,6 +118,39 @@ static const struct lpsc_resource lpsc[] = { { DAVINCI_LPSC_GPIO }, }; +#ifndef CONFIG_DA850_EVM_MAX_CPU_CLK +#define CONFIG_DA850_EVM_MAX_CPU_CLK 300000000 +#endif + +/* + * get_board_rev() - setup to pass kernel board revision information + * Returns: + * bit[0-3] Maximum cpu clock rate supported by onboard SoC + * 0000b - 300 MHz + * 0001b - 372 MHz + * 0010b - 408 MHz + * 0011b - 456 MHz + */ +u32 get_board_rev(void) +{ + char *s; + u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK; + u32 rev = 0; + + s = getenv("maxcpuclk"); + if (s) + maxcpuclk = simple_strtoul(s, NULL, 10); + + if (maxcpuclk >= 456000000) + rev = 3; + else if (maxcpuclk >= 408000000) + rev = 2; + else if (maxcpuclk >= 372000000) + rev = 1; + + return rev; +} + int board_init(void) { #ifndef CONFIG_USE_IRQ |