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authorWolfgang Denk <wd@denx.de>2009-12-15 23:38:34 +0100
committerWolfgang Denk <wd@denx.de>2009-12-15 23:38:34 +0100
commitbb3bcfa2426cc6a0aecec7270e3ee67ca843a125 (patch)
tree0314e3d8e8d9e4d568a496fca27db33d66e68bb4 /board/davinci/common/misc.c
parenta200a7c04d89853d2a1395b96d8ca5e3dd754551 (diff)
parent4b142febff71eabdb7ddbb125c7b583b24ddc434 (diff)
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Merge branch 'next' of ../next
Diffstat (limited to 'board/davinci/common/misc.c')
-rw-r--r--board/davinci/common/misc.c48
1 files changed, 47 insertions, 1 deletions
diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c
index ffdc20b..9fab76f 100644
--- a/board/davinci/common/misc.c
+++ b/board/davinci/common/misc.c
@@ -1,6 +1,7 @@
/*
* Miscelaneous DaVinci functions.
*
+ * Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com>
* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
* Copyright (C) 2008 Lyrtech <www.lyrtech.com>
* Copyright (C) 2004 Texas Instruments.
@@ -27,7 +28,8 @@
#include <i2c.h>
#include <net.h>
#include <asm/arch/hardware.h>
-
+#include <asm/io.h>
+#include "misc.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -109,3 +111,47 @@ void dv_configure_mac_address(uint8_t *rom_enetaddr)
}
#endif /* DAVINCI_EMAC */
+
+/*
+ * Change the setting of a pin multiplexer field.
+ *
+ * Takes an array of pinmux settings similar to:
+ *
+ * struct pinmux_config uart_pins[] = {
+ * { &davinci_syscfg_regs->pinmux[8], 2, 7 },
+ * { &davinci_syscfg_regs->pinmux[9], 2, 0 }
+ * };
+ *
+ * Stepping through the array, each pinmux[n] register has the given value
+ * set in the pin mux field specified.
+ *
+ * The number of pins in the array must be passed (ARRAY_SIZE can provide
+ * this value conveniently).
+ *
+ * Returns 0 if all field numbers and values are in the correct range,
+ * else returns -1.
+ */
+int davinci_configure_pin_mux(const struct pinmux_config *pins,
+ const int n_pins)
+{
+ int i;
+
+ /* check for invalid pinmux values */
+ for (i = 0; i < n_pins; i++) {
+ if (pins[i].field >= PIN_MUX_NUM_FIELDS ||
+ (pins[i].value & ~PIN_MUX_FIELD_MASK) != 0)
+ return -1;
+ }
+
+ /* configure the pinmuxes */
+ for (i = 0; i < n_pins; i++) {
+ const int offset = pins[i].field * PIN_MUX_FIELD_SIZE;
+ const unsigned int value = pins[i].value << offset;
+ const unsigned int mask = PIN_MUX_FIELD_MASK << offset;
+ const dv_reg *mux = pins[i].mux;
+
+ writel(value | (readl(mux) & (~mask)), mux);
+ }
+
+ return 0;
+}