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| author | Stefan Roese <sr@denx.de> | 2008-10-21 11:43:08 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-10-21 11:43:08 +0200 |
| commit | f61f1e150c84f5b9347fca79a4bc5f2286c545d2 (patch) | |
| tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /board/dave/common/fpga.c | |
| parent | ec081c2c190148b374e86a795fb6b1c49caeb549 (diff) | |
| parent | f82642e33899766892499b163e60560fbbf87773 (diff) | |
| download | u-boot-imx-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.zip u-boot-imx-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.tar.gz u-boot-imx-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.tar.bz2 | |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'board/dave/common/fpga.c')
| -rw-r--r-- | board/dave/common/fpga.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/board/dave/common/fpga.c b/board/dave/common/fpga.c index 5b5b5e9..30bc196 100644 --- a/board/dave/common/fpga.c +++ b/board/dave/common/fpga.c @@ -36,12 +36,12 @@ #define MAX_ONES 226 -#ifdef CFG_FPGA_PRG -# define FPGA_PRG CFG_FPGA_PRG /* FPGA program pin (ppc output)*/ -# define FPGA_CLK CFG_FPGA_CLK /* FPGA clk pin (ppc output) */ -# define FPGA_DATA CFG_FPGA_DATA /* FPGA data pin (ppc output) */ -# define FPGA_DONE CFG_FPGA_DONE /* FPGA done pin (ppc input) */ -# define FPGA_INIT CFG_FPGA_INIT /* FPGA init pin (ppc input) */ +#ifdef CONFIG_SYS_FPGA_PRG +# define FPGA_PRG CONFIG_SYS_FPGA_PRG /* FPGA program pin (ppc output)*/ +# define FPGA_CLK CONFIG_SYS_FPGA_CLK /* FPGA clk pin (ppc output) */ +# define FPGA_DATA CONFIG_SYS_FPGA_DATA /* FPGA data pin (ppc output) */ +# define FPGA_DONE CONFIG_SYS_FPGA_DONE /* FPGA done pin (ppc input) */ +# define FPGA_INIT CONFIG_SYS_FPGA_INIT /* FPGA init pin (ppc input) */ #else # define FPGA_PRG 0x04000000 /* FPGA program pin (ppc output) */ # define FPGA_CLK 0x02000000 /* FPGA clk pin (ppc output) */ @@ -74,7 +74,7 @@ static int fpga_boot (unsigned char *fpgadata, int size) int i, index, len; int count; -#ifdef CFG_FPGA_SPARTAN2 +#ifdef CONFIG_SYS_FPGA_SPARTAN2 int j; #else unsigned char b; @@ -89,7 +89,7 @@ static int fpga_boot (unsigned char *fpgadata, int size) index += len + 3; } -#ifdef CFG_FPGA_SPARTAN2 +#ifdef CONFIG_SYS_FPGA_SPARTAN2 /* search for preamble 0xFFFFFFFF */ while (1) { if ((fpgadata[index] == 0xff) && (fpgadata[index + 1] == 0xff) @@ -167,7 +167,7 @@ static int fpga_boot (unsigned char *fpgadata, int size) DBG ("write configuration data into fpga\n"); /* write configuration-data into fpga... */ -#ifdef CFG_FPGA_SPARTAN2 +#ifdef CONFIG_SYS_FPGA_SPARTAN2 /* * Load uncompressed image into fpga */ @@ -181,7 +181,7 @@ static int fpga_boot (unsigned char *fpgadata, int size) fpgadata[i] <<= 1; } } -#else /* ! CFG_FPGA_SPARTAN2 */ +#else /* ! CONFIG_SYS_FPGA_SPARTAN2 */ /* send 0xff 0x20 */ FPGA_WRITE_1; FPGA_WRITE_1; @@ -228,7 +228,7 @@ static int fpga_boot (unsigned char *fpgadata, int size) FPGA_WRITE_1; } } -#endif /* CFG_FPGA_SPARTAN2 */ +#endif /* CONFIG_SYS_FPGA_SPARTAN2 */ DBG ("%s, ", ((in32 (GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE"); |