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| author | Stefan Roese <sr@denx.de> | 2009-09-09 16:25:29 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2009-09-11 10:35:58 +0200 |
| commit | d1c3b27525b664e8c4db6bb173eed51bfc8220de (patch) | |
| tree | c00f3d0bcfbd5fcc1954cc9cefdbc4c9c41f41ea /board/dave/PPChameleonEVB | |
| parent | e7963772eb78a6aa1fa65063d64eab3a8626daac (diff) | |
| download | u-boot-imx-d1c3b27525b664e8c4db6bb173eed51bfc8220de.zip u-boot-imx-d1c3b27525b664e8c4db6bb173eed51bfc8220de.tar.gz u-boot-imx-d1c3b27525b664e8c4db6bb173eed51bfc8220de.tar.bz2 | |
ppc4xx: Big cleanup of PPC4xx defines
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:
- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines
Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/dave/PPChameleonEVB')
| -rw-r--r-- | board/dave/PPChameleonEVB/PPChameleonEVB.c | 6 | ||||
| -rw-r--r-- | board/dave/PPChameleonEVB/flash.c | 8 |
2 files changed, 7 insertions, 7 deletions
diff --git a/board/dave/PPChameleonEVB/PPChameleonEVB.c b/board/dave/PPChameleonEVB/PPChameleonEVB.c index a6aa655..56751e1 100644 --- a/board/dave/PPChameleonEVB/PPChameleonEVB.c +++ b/board/dave/PPChameleonEVB/PPChameleonEVB.c @@ -65,9 +65,9 @@ int board_early_init_f (void) * EBC Configuration Register: set ready timeout to 512 ebc-clks -> ca. 15 us */ #if 1 /* test-only */ - mtebc (epcr, 0xa8400000); /* ebc always driven */ + mtebc (EBC0_CFG, 0xa8400000); /* ebc always driven */ #else - mtebc (epcr, 0x28400000); /* ebc in high-z */ + mtebc (EBC0_CFG, 0x28400000); /* ebc in high-z */ #endif return 0; } @@ -101,7 +101,7 @@ int misc_init_r (void) int status; int index; int i; - unsigned long cntrl0Reg; + unsigned long CPC0_CR0Reg; dst = malloc(CONFIG_SYS_FPGA_MAX_SIZE); if (gunzip (dst, CONFIG_SYS_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) { diff --git a/board/dave/PPChameleonEVB/flash.c b/board/dave/PPChameleonEVB/flash.c index e5a0d3d..237c807 100644 --- a/board/dave/PPChameleonEVB/flash.c +++ b/board/dave/PPChameleonEVB/flash.c @@ -75,9 +75,9 @@ unsigned long flash_init (void) debug("[%s, %d] Test point ...\n", __FUNCTION__, __LINE__); /* Re-do sizing to get full correct info */ - mtdcr(ebccfga, pb0cr); - pbcr = mfdcr(ebccfgd); - mtdcr(ebccfga, pb0cr); + mtdcr(EBC0_CFGADDR, PB0CR); + pbcr = mfdcr(EBC0_CFGDATA); + mtdcr(EBC0_CFGADDR, PB0CR); base = -size; switch (size) { case 1 << 20: @@ -97,7 +97,7 @@ unsigned long flash_init (void) break; } pbcr = (pbcr & 0x0001ffff) | base | (size_val << 17); - mtdcr(ebccfgd, pbcr); + mtdcr(EBC0_CFGDATA, pbcr); debug("[%s, %d] Test point ...\n", __FUNCTION__, __LINE__); /* Monitor protection ON by default */ |