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authorWolfgang Denk <wd@atlas.denx.de>2006-03-06 23:18:48 +0100
committerWolfgang Denk <wd@atlas.denx.de>2006-03-06 23:18:48 +0100
commit951a954b77ef30df1f5c1b7b9b4312e783b2cbb4 (patch)
tree8f94ab1a2e15fbf31c322e6be1f750e10ac2fe2f /board/dave/PPChameleonEVB
parentac7d97dcbb499c96c8182757f301dd2e09c9f49d (diff)
parentbfc81252c0de3bfcf92c7c35bc04341fb33e4e4e (diff)
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Merge with /home/wd/git/u-boot/master
Code cleanup.
Diffstat (limited to 'board/dave/PPChameleonEVB')
-rw-r--r--board/dave/PPChameleonEVB/config.mk5
-rw-r--r--board/dave/PPChameleonEVB/nand.c38
2 files changed, 8 insertions, 35 deletions
diff --git a/board/dave/PPChameleonEVB/config.mk b/board/dave/PPChameleonEVB/config.mk
index 6e03b72..1dc635f 100644
--- a/board/dave/PPChameleonEVB/config.mk
+++ b/board/dave/PPChameleonEVB/config.mk
@@ -27,5 +27,8 @@
# Reserve 320 kB for Monitor
TEXT_BASE = 0xFFFB0000
-# Compile the new NAND code (needed iff #ifdef CONFIG_NEW_NAND_CODE)
+# Compile the new NAND code (CFG_NAND_LEGACY mustn't be defined)
BOARDLIBS = drivers/nand/libnand.a
+
+# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined)
+#BOARDLIBS = drivers/nand_legacy/libnand_legacy.a
diff --git a/board/dave/PPChameleonEVB/nand.c b/board/dave/PPChameleonEVB/nand.c
index 16c67cd..40a827c 100644
--- a/board/dave/PPChameleonEVB/nand.c
+++ b/board/dave/PPChameleonEVB/nand.c
@@ -22,9 +22,8 @@
#include <common.h>
+
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#ifdef CONFIG_NEW_NAND_CODE
-/* new NAND handling */
#include <nand.h>
@@ -82,7 +81,7 @@ static int ppchameleonevb_device_ready(struct mtd_info *mtdinfo)
break;
}
- if (in32(GPIO0_IR) & rb_gpio_pin)
+ if (in32(GPIO0_IR) & rb_gpio_pin)
return 1;
return 0;
}
@@ -90,7 +89,7 @@ static int ppchameleonevb_device_ready(struct mtd_info *mtdinfo)
/*
* Board-specific NAND initialization. The following members of the
- * argument are board-specific (per include/linux/mtd/nand_new.h):
+ * argument are board-specific (per include/linux/mtd/nand.h):
* - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
* - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
* - hwcontrol: hardwarespecific function for accesing control-lines
@@ -115,33 +114,4 @@ void board_nand_init(struct nand_chip *nand)
nand->chip_delay = NAND_BIG_DELAY_US;
nand->options = NAND_SAMSUNG_LP_OPTIONS;
}
-
-#else
-
-/* old NAND handling */
-extern ulong
-nand_probe(ulong physadr);
-
-void
-nand_init(void)
-{
- ulong totlen = 0;
-
-/*
- The HI model is equipped with a large block NAND chip not supported yet
- by U-Boot
- (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_HI)
-*/
-
-#if (CONFIG_PPCHAMELEON_MODULE_MODEL == CONFIG_PPCHAMELEON_MODULE_ME)
- debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE);
- totlen += nand_probe (CFG_NAND0_BASE);
-#endif /* CONFIG_PPCHAMELEON_MODULE_ME, CONFIG_PPCHAMELEON_MODULE_HI */
-
- debug ("Probing at 0x%.8x\n", CFG_NAND1_BASE);
- totlen += nand_probe (CFG_NAND1_BASE);
-
- printf ("%3lu MB\n", totlen >>20);
-}
-#endif
-#endif
+#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */