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authorStefan Roese <sr@denx.de>2005-11-01 10:02:21 +0100
committerStefan Roese <sr@denx.de>2005-11-01 10:02:21 +0100
commitd9f2f5008c32c8373d68a4c8e14f50a469965a23 (patch)
tree64dd39bdb04a7b0d4034d3037e288e7d2341379f /board/csb272/csb272.c
parente190290ba40fc5340cefd04dd6abf5def15065b9 (diff)
parentbe360d9824d653780ebd3ffc08f1938a8e3dd747 (diff)
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Merge with /git/u-boot.git
Diffstat (limited to 'board/csb272/csb272.c')
-rw-r--r--board/csb272/csb272.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c
index e847879..24c6f0d 100644
--- a/board/csb272/csb272.c
+++ b/board/csb272/csb272.c
@@ -164,10 +164,15 @@ long initdram (int board_type)
int last_stage_init(void)
{
/* initialize the PHY */
- miiphy_reset(CONFIG_PHY_ADDR);
- miiphy_write(CONFIG_PHY_ADDR, PHY_BMCR,
- PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); /* AUTO neg */
- miiphy_write(CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08); /* LEDs */
+ miiphy_reset("ppc_4xx_eth0", CONFIG_PHY_ADDR);
+
+ /* AUTO neg */
+ miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_BMCR,
+ PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
+
+ /* LEDs */
+ miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08);
+
return 0; /* success */
}