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| author | Gerlando Falauto <gerlando.falauto@keymile.com> | 2012-07-20 02:34:25 +0000 |
|---|---|---|
| committer | Prafulla Wadaskar <prafulla@marvell.com> | 2012-10-03 16:43:13 +0530 |
| commit | 455151652524570d7c5b320718c7004e63e01656 (patch) | |
| tree | e7e4b8fc9d5bf69aefa2fa18e62aab2aeee52b05 /board/cpc45 | |
| parent | cf37c5d98bb2e23fbcbca8a0328ca7dd43d6af8c (diff) | |
| download | u-boot-imx-455151652524570d7c5b320718c7004e63e01656.zip u-boot-imx-455151652524570d7c5b320718c7004e63e01656.tar.gz u-boot-imx-455151652524570d7c5b320718c7004e63e01656.tar.bz2 | |
kirkwood: implement kw_sdram_bs_set()
Some boards might be equipped with different SDRAM configurations.
When that is the case, CPU CS Window Size Register (CS[0]n Size)
should be set to the biggest value through board.cfg file; then its
value can be fixed at runtime according to the detected SDRAM size.
Therefore, implement kw_sdram_bs_set().
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Marek Vasut <marex@denx.de>
Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
Diffstat (limited to 'board/cpc45')
0 files changed, 0 insertions, 0 deletions