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| author | Nikita Kiryanov <nikita@compulab.co.il> | 2016-02-19 19:19:49 +0200 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-02-24 18:44:09 -0500 |
| commit | 43e568c4ae9a35e2458737c7d995b183e21b8a6f (patch) | |
| tree | a76e705274d8cc2bce3ca9c6f7162b8bda0a7ae9 /board/compulab | |
| parent | e038e2a89b213640143d6ab1bbf73b134292e4dc (diff) | |
| download | u-boot-imx-43e568c4ae9a35e2458737c7d995b183e21b8a6f.zip u-boot-imx-43e568c4ae9a35e2458737c7d995b183e21b8a6f.tar.gz u-boot-imx-43e568c4ae9a35e2458737c7d995b183e21b8a6f.tar.bz2 | |
arm: am437x: cm-t43: set MPU and CORE voltages on boot
During boot, U-Boot raises the CPU frequency but the CORE and MPU regulators
are not updated. This is not a problem in cold boot since the default values
that the pmic outputs are correct, but if Linux were to switch the module to a
low power OPP, the new voltage values will be retained after a reboot and the
module will likely hang once U-Boot raises the CPU frequency back up.
Set both CORE and MPU regulators to to 1.1V on boot.
Cc: Tom Rini <trini@konsulko.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'board/compulab')
| -rw-r--r-- | board/compulab/cm_t43/spl.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/board/compulab/cm_t43/spl.c b/board/compulab/cm_t43/spl.c index 520de24..b7d118e 100644 --- a/board/compulab/cm_t43/spl.c +++ b/board/compulab/cm_t43/spl.c @@ -6,9 +6,13 @@ #include <common.h> #include <spl.h> +#include <i2c.h> #include <asm/arch/clock.h> #include <asm/arch/ddr_defs.h> #include <asm/gpio.h> +#include <power/pmic.h> +#include <power/tps65218.h> +#include "board.h" DECLARE_GLOBAL_DATA_PTR; @@ -100,6 +104,17 @@ const struct dpll_params *get_dpll_per_params(void) return &dpll_per; } +void scale_vcores(void) +{ + set_i2c_pin_mux(); + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); + if (i2c_probe(TPS65218_CHIP_PM)) + return; + + tps65218_voltage_update(TPS65218_DCDC1, TPS65218_DCDC_VOLT_SEL_1100MV); + tps65218_voltage_update(TPS65218_DCDC2, TPS65218_DCDC_VOLT_SEL_1100MV); +} + void sdram_init(void) { unsigned long ram_size; |