summaryrefslogtreecommitdiff
path: root/board/compulab/cm_t335
diff options
context:
space:
mode:
authorChen-Yu Tsai <wens@csie.org>2015-06-23 19:57:24 +0800
committerHans de Goede <hdegoede@redhat.com>2015-07-05 11:32:11 +0200
commitdec7c84227339cda4bf6c7d9a411ea189473112d (patch)
treee1dbe832018ddbef8df7792ef221c9b5cb588c3c /board/compulab/cm_t335
parent6ad8c743001c1114c5921f78c17e6fb43d4b6ca0 (diff)
downloadu-boot-imx-dec7c84227339cda4bf6c7d9a411ea189473112d.zip
u-boot-imx-dec7c84227339cda4bf6c7d9a411ea189473112d.tar.gz
u-boot-imx-dec7c84227339cda4bf6c7d9a411ea189473112d.tar.bz2
sunxi: rsb: Enable R_PIO clock before configuring external pins
The original code was configuring the external pins after enabling the R_PIO clock, which meant the configuration never made it to the pin controller the first time in SPL. Why this was working before is uncertain. Maybe the state was left from a previous boot sequence, or RSB just happened to be the default configuration. However with some A33 chips, SPL failed to configure the PMIC. This was seen by me and Maxime on the Sinlinx SinA33 dev board. Reordering the calls fixed this. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'board/compulab/cm_t335')
0 files changed, 0 insertions, 0 deletions