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authorLokesh Vutla <lokeshvutla@ti.com>2013-12-10 15:02:21 +0530
committerTom Rini <trini@ti.com>2013-12-18 21:14:18 -0500
commit965de8b91bddd1f5967240d1d44005719b09dd5e (patch)
treedbcbdffdaaf14e8ace3eb1a911f27ace0352bbc6 /board/compulab/cm_t335
parentcf04d0326bd1e24909cfe644c0c8676440a915b1 (diff)
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ARM: AM33xx+: Update ioregs to pass different values
Currently same value is programmed for all ioregs. This is not the case for all SoC's like AM4372. So adding a structure for ioregs and updating in all board files. And also return from config_cmd_ctrl() and config_ddr_data() functions if data is not passed. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [trini: Fixup dxr2, cm_t335, adapt pcm051 rev3] Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'board/compulab/cm_t335')
-rw-r--r--board/compulab/cm_t335/spl.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/board/compulab/cm_t335/spl.c b/board/compulab/cm_t335/spl.c
index 99f3a86..b3b150a 100644
--- a/board/compulab/cm_t335/spl.c
+++ b/board/compulab/cm_t335/spl.c
@@ -20,6 +20,14 @@
#include <asm/arch/hardware_am33xx.h>
#include <asm/sizes.h>
+const struct ctrl_ioregs ioregs = {
+ .cm0ioctl = MT41J128MJT125_IOCTRL_VALUE,
+ .cm1ioctl = MT41J128MJT125_IOCTRL_VALUE,
+ .cm2ioctl = MT41J128MJT125_IOCTRL_VALUE,
+ .dt0ioctl = MT41J128MJT125_IOCTRL_VALUE,
+ .dt1ioctl = MT41J128MJT125_IOCTRL_VALUE,
+};
+
static const struct ddr_data ddr3_data = {
.datardsratio0 = MT41J128MJT125_RD_DQS,
.datawdsratio0 = MT41J128MJT125_WR_DQS,
@@ -89,7 +97,7 @@ static void probe_sdram_size(long size)
reset_cpu(0);
}
debug("%s: setting DRAM size to %ldM\n", __func__, size >> 20);
- config_ddr(303, MT41J128MJT125_IOCTRL_VALUE, &ddr3_data,
+ config_ddr(303, &ioregs, &ddr3_data,
&ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
}