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authorStephen Warren <swarren@nvidia.com>2014-03-21 12:28:58 -0600
committerTom Warren <twarren@nvidia.com>2014-04-17 08:41:05 -0700
commit70ad375ee444645001d3ca78bb17790b50232999 (patch)
tree5b6b1edfc674954bee1e8546bc173e74d2976b0b /board/compal
parentdfb42fc95df6b5908fb593db9132018233430fe9 (diff)
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ARM: tegra: Tegra20 pinmux cleanup
This renames all the Tegra20 pinmux pins and functions so they have a prefix which matches the type name. The entries in tegra20_pingroups[] are all updated to remove the columns which are no longer used. All affected code is updated to match. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'board/compal')
-rw-r--r--board/compal/paz00/paz00.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c
index d6e5c37..462ab05 100644
--- a/board/compal/paz00/paz00.c
+++ b/board/compal/paz00/paz00.c
@@ -28,23 +28,23 @@
void pin_mux_mmc(void)
{
/* SDMMC4: config 3, x8 on 2nd set of pins */
- pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4);
- pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4);
- pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4);
+ pinmux_set_func(PMUX_PINGRP_ATB, PMUX_FUNC_SDIO4);
+ pinmux_set_func(PMUX_PINGRP_GMA, PMUX_FUNC_SDIO4);
+ pinmux_set_func(PMUX_PINGRP_GME, PMUX_FUNC_SDIO4);
- pinmux_tristate_disable(PINGRP_ATB);
- pinmux_tristate_disable(PINGRP_GMA);
- pinmux_tristate_disable(PINGRP_GME);
+ pinmux_tristate_disable(PMUX_PINGRP_ATB);
+ pinmux_tristate_disable(PMUX_PINGRP_GMA);
+ pinmux_tristate_disable(PMUX_PINGRP_GME);
/* SDIO1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */
- pinmux_set_func(PINGRP_SDIO1, PMUX_FUNC_SDIO1);
+ pinmux_set_func(PMUX_PINGRP_SDIO1, PMUX_FUNC_SDIO1);
- pinmux_tristate_disable(PINGRP_SDIO1);
+ pinmux_tristate_disable(PMUX_PINGRP_SDIO1);
/* For power GPIO PV1 */
- pinmux_tristate_disable(PINGRP_UAC);
+ pinmux_tristate_disable(PMUX_PINGRP_UAC);
/* For CD GPIO PV5 */
- pinmux_tristate_disable(PINGRP_GPV);
+ pinmux_tristate_disable(PMUX_PINGRP_GPV);
}
#endif
@@ -55,6 +55,6 @@ void pin_mux_display(void)
debug("init display pinmux\n");
/* EN_VDD_PANEL GPIO A4 */
- pinmux_tristate_disable(PINGRP_DAP2);
+ pinmux_tristate_disable(PMUX_PINGRP_DAP2);
}
#endif