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authorStefan Roese <sr@denx.de>2008-10-21 11:43:08 +0200
committerStefan Roese <sr@denx.de>2008-10-21 11:43:08 +0200
commitf61f1e150c84f5b9347fca79a4bc5f2286c545d2 (patch)
treeab90f076f18e56b2b3e8c9375b95917daa78c1d9 /board/cogent/mb.h
parentec081c2c190148b374e86a795fb6b1c49caeb549 (diff)
parentf82642e33899766892499b163e60560fbbf87773 (diff)
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Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'board/cogent/mb.h')
-rw-r--r--board/cogent/mb.h44
1 files changed, 22 insertions, 22 deletions
diff --git a/board/cogent/mb.h b/board/cogent/mb.h
index f6eaf0a..b3aba48 100644
--- a/board/cogent/mb.h
+++ b/board/cogent/mb.h
@@ -69,51 +69,51 @@
* 0xA000000-0xDFFFFFF.
*/
-#define CMA_MB_RAM_BASE (CFG_CMA_MB_BASE+0x0000000)
+#define CMA_MB_RAM_BASE (CONFIG_SYS_CMA_MB_BASE+0x0000000)
#define CMA_MB_RAM_SIZE 0x2000000 /* dip sws set actual size */
#if (CMA_MB_CAPS & CMA_MB_CAP_SLOT1)
-#define CMA_MB_SLOT1_BASE (CFG_CMA_MB_BASE+0x2000000)
+#define CMA_MB_SLOT1_BASE (CONFIG_SYS_CMA_MB_BASE+0x2000000)
#define CMA_MB_SLOT1_SIZE 0x2000000
#endif
#if (CMA_MB_CAPS & CMA_MB_CAP_SLOT2)
-#define CMA_MB_SLOT2_BASE (CFG_CMA_MB_BASE+0x4000000)
+#define CMA_MB_SLOT2_BASE (CONFIG_SYS_CMA_MB_BASE+0x4000000)
#define CMA_MB_SLOT2_SIZE 0x2000000
#endif
#if (CMA_MB_CAPS & CMA_MB_CAP_PCI)
-#define CMA_MB_STDPCI_BASE (CFG_CMA_MB_BASE+0x4000000)
+#define CMA_MB_STDPCI_BASE (CONFIG_SYS_CMA_MB_BASE+0x4000000)
#define CMA_MB_STDPCI_SIZE 0x1ff0000
-#define CMA_MB_V360EPC_BASE (CFG_CMA_MB_BASE+0x5ff0000)
+#define CMA_MB_V360EPC_BASE (CONFIG_SYS_CMA_MB_BASE+0x5ff0000)
#define CMA_MB_V360EPC_SIZE 0x10000
#endif
#if (CMA_MB_CAPS & CMA_MB_CAP_SLOT3)
-#define CMA_MB_SLOT3_BASE (CFG_CMA_MB_BASE+0x6000000)
+#define CMA_MB_SLOT3_BASE (CONFIG_SYS_CMA_MB_BASE+0x6000000)
#define CMA_MB_SLOT3_SIZE 0x2000000
#endif
#if (CMA_MB_CAPS & CMA_MB_CAP_PCI_EXT)
-#define CMA_MB_EXTPCI_BASE (CFG_CMA_MB_BASE+0xa000000)
+#define CMA_MB_EXTPCI_BASE (CONFIG_SYS_CMA_MB_BASE+0xa000000)
#define CMA_MB_EXTPCI_SIZE 0x4000000
#endif
-#define CMA_MB_ROMLOW_BASE (CFG_CMA_MB_BASE+0xe000000)
+#define CMA_MB_ROMLOW_BASE (CONFIG_SYS_CMA_MB_BASE+0xe000000)
#define CMA_MB_ROMLOW_SIZE 0x800000
#if (CMA_MB_CAPS & CMA_MB_CAP_FLASH)
-#define CMA_MB_FLLOW_EXEC_BASE (CFG_CMA_MB_BASE+0xe000000)
+#define CMA_MB_FLLOW_EXEC_BASE (CONFIG_SYS_CMA_MB_BASE+0xe000000)
#define CMA_MB_FLLOW_EXEC_SIZE 0x100000
-#define CMA_MB_FLLOW_RDWR_BASE (CFG_CMA_MB_BASE+0xe400000)
+#define CMA_MB_FLLOW_RDWR_BASE (CONFIG_SYS_CMA_MB_BASE+0xe400000)
#define CMA_MB_FLLOW_RDWR_SIZE 0x400000
#endif
#if (CMA_MB_CAPS & CMA_MB_CAP_RTC)
-#define CMA_MB_RTC_BASE (CFG_CMA_MB_BASE+0xe800000)
+#define CMA_MB_RTC_BASE (CONFIG_SYS_CMA_MB_BASE+0xe800000)
#define CMA_MB_RTC_SIZE 0x4000
#endif
#if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR)
-#define CMA_MB_SERPAR_BASE (CFG_CMA_MB_BASE+0xe900000)
+#define CMA_MB_SERPAR_BASE (CONFIG_SYS_CMA_MB_BASE+0xe900000)
#define CMA_MB_SERIALB_BASE (CMA_MB_SERPAR_BASE+0x00)
#define CMA_MB_SERIALA_BASE (CMA_MB_SERPAR_BASE+0x40)
#define CMA_MB_PARALLEL_BASE (CMA_MB_SERPAR_BASE+0x80)
@@ -121,20 +121,20 @@
#endif
#if (CMA_MB_CAPS & CMA_MB_CAP_KBM)
-#define CMA_MB_PKBM_BASE (CFG_CMA_MB_BASE+0xe900100)
+#define CMA_MB_PKBM_BASE (CONFIG_SYS_CMA_MB_BASE+0xe900100)
#define CMA_MB_PKBM_SIZE 0x10
#endif
#if (CMA_MB_CAPS & CMA_MB_CAP_LCD)
-#define CMA_MB_LCD_BASE (CFG_CMA_MB_BASE+0xeb00000)
+#define CMA_MB_LCD_BASE (CONFIG_SYS_CMA_MB_BASE+0xeb00000)
#define CMA_MB_LCD_SIZE 0x10
#endif
-#define CMA_MB_DIPSW_BASE (CFG_CMA_MB_BASE+0xec00000)
+#define CMA_MB_DIPSW_BASE (CONFIG_SYS_CMA_MB_BASE+0xec00000)
#define CMA_MB_DIPSW_SIZE 0x10
#if (CMA_MB_CAPS & (CMA_MB_CAP_SLOT1|CMA_MB_CAP_SER2|CMA_MB_CAP_KBM))
-#define CMA_MB_SLOT1CFG_BASE (CFG_CMA_MB_BASE+0xf100000)
+#define CMA_MB_SLOT1CFG_BASE (CONFIG_SYS_CMA_MB_BASE+0xf100000)
#if (CMA_MB_CAPS & CMA_MB_CAP_SER2)
#define CMA_MB_SER2_BASE (CMA_MB_SLOT1CFG_BASE+0x80)
#define CMA_MB_SER2B_BASE (CMA_MB_SER2_BASE+0x00)
@@ -152,7 +152,7 @@
#endif
#if (CMA_MB_CAPS & CMA_MB_CAP_SLOT2)
-#define CMA_MB_SLOT2CFG_BASE (CFG_CMA_MB_BASE+0xf200000)
+#define CMA_MB_SLOT2CFG_BASE (CONFIG_SYS_CMA_MB_BASE+0xf200000)
#if defined(CONFIG_CMA302) && defined(CONFIG_CMA302_SLOT2)
#define CMA_MB_S2KBM_BASE (CMA_MB_SLOT2CFG_BASE+0x200)
#endif
@@ -160,7 +160,7 @@
#endif
#if (CMA_MB_CAPS & CMA_MB_CAP_PCI)
-#define CMA_MB_PCICTL_BASE (CFG_CMA_MB_BASE+0xf200000)
+#define CMA_MB_PCICTL_BASE (CONFIG_SYS_CMA_MB_BASE+0xf200000)
#define CMA_MB_PCI_V3CTL_BASE (CMA_MB_PCICTL_BASE+0x100)
#define CMA_MB_PCI_IDSEL_BASE (CMA_MB_PCICTL_BASE+0x200)
#define CMA_MB_PCI_IMASK_BASE (CMA_MB_PCICTL_BASE+0x300)
@@ -171,19 +171,19 @@
#endif
#if (CMA_MB_CAPS & CMA_MB_CAP_SLOT3)
-#define CMA_MB_SLOT3CFG_BASE (CFG_CMA_MB_BASE+0xf300000)
+#define CMA_MB_SLOT3CFG_BASE (CONFIG_SYS_CMA_MB_BASE+0xf300000)
#if defined(CONFIG_CMA302) && defined(CONFIG_CMA302_SLOT3)
#define CMA_MB_S3KBM_BASE (CMA_MB_SLOT3CFG_BASE+0x200)
#endif
#define CMA_MB_SLOT3CFG_SIZE 0x400
#endif
-#define CMA_MB_ROMHIGH_BASE (CFG_CMA_MB_BASE+0xf800000)
+#define CMA_MB_ROMHIGH_BASE (CONFIG_SYS_CMA_MB_BASE+0xf800000)
#define CMA_MB_ROMHIGH_SIZE 0x800000
#if (CMA_MB_CAPS & CMA_MB_CAP_FLASH)
-#define CMA_MB_FLHIGH_EXEC_BASE (CFG_CMA_MB_BASE+0xf800000)
+#define CMA_MB_FLHIGH_EXEC_BASE (CONFIG_SYS_CMA_MB_BASE+0xf800000)
#define CMA_MB_FLHIGH_EXEC_SIZE 0x100000
-#define CMA_MB_FLHIGH_RDWR_BASE (CFG_CMA_MB_BASE+0xfc00000)
+#define CMA_MB_FLHIGH_RDWR_BASE (CONFIG_SYS_CMA_MB_BASE+0xfc00000)
#define CMA_MB_FLHIGH_RDWR_SIZE 0x400000
#endif