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| author | Zhang Jiejing <jiejing.zhang@freescale.com> | 2011-12-02 15:08:57 +0800 |
|---|---|---|
| committer | Zhang Jiejing <jiejing.zhang@freescale.com> | 2011-12-05 15:03:29 +0800 |
| commit | de0443f4d45852313f1231f48a83365e8f3f26bf (patch) | |
| tree | f3d0052917516e92193ede8d1626e4e7495afa9a /board/cm41xx | |
| parent | e696f7dac56591a5616b397bc32a1d9bb57147ee (diff) | |
| download | u-boot-imx-de0443f4d45852313f1231f48a83365e8f3f26bf.zip u-boot-imx-de0443f4d45852313f1231f48a83365e8f3f26bf.tar.gz u-boot-imx-de0443f4d45852313f1231f48a83365e8f3f26bf.tar.bz2 | |
ENGR00163704: MX5X: add i2c recovery function in board_lateinit.
This patch add a i2c bus recovery function, the i2c bus busy
because some device pull down the I2C SDA line. This happens
when Host is reading some byte from slave, and then host is
reset/reboot.
Since in this case, device is controlling i2c SDA line, the
only thing host can do this give the clock on SCL and sending
NAK, and STOP to finish this transaction.
To fix this issue:
when we found SDA is low, we generate 8 clock to let device
send data, then send a NAK, and STOP to finish this I2C
transaction , after this the clock will be clean.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
Diffstat (limited to 'board/cm41xx')
0 files changed, 0 insertions, 0 deletions