diff options
| author | Mike Frysinger <vapier@gentoo.org> | 2010-06-02 19:30:15 -0400 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2010-07-13 17:50:52 -0400 |
| commit | b14fff8dce55e474c2de47d1722e3ae58546f5c4 (patch) | |
| tree | eb081252b81dedf174525cfd20c4ce48dd4dae9b /board/cm-bf548/cm-bf548.c | |
| parent | 22e64405860f7428636551d43ddfbb811c3a167f (diff) | |
| download | u-boot-imx-b14fff8dce55e474c2de47d1722e3ae58546f5c4.zip u-boot-imx-b14fff8dce55e474c2de47d1722e3ae58546f5c4.tar.gz u-boot-imx-b14fff8dce55e474c2de47d1722e3ae58546f5c4.tar.bz2 | |
Blackfin: cm-bf548: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'board/cm-bf548/cm-bf548.c')
| -rw-r--r-- | board/cm-bf548/cm-bf548.c | 55 |
1 files changed, 8 insertions, 47 deletions
diff --git a/board/cm-bf548/cm-bf548.c b/board/cm-bf548/cm-bf548.c index 3627586..90ce4c3 100644 --- a/board/cm-bf548/cm-bf548.c +++ b/board/cm-bf548/cm-bf548.c @@ -11,6 +11,7 @@ #include <command.h> #include <netdev.h> #include <asm/blackfin.h> +#include <asm/portmux.h> DECLARE_GLOBAL_DATA_PTR; @@ -23,53 +24,13 @@ int checkboard(void) int board_early_init_f(void) { - /* Port H: PH8 - PH13 == A4 - A9 - * address lines of the parallel asynchronous memory interface - */ - - /************************************************ - * configure GPIO * - * set port H function enable register * - * configure PH8-PH13 as peripheral (not GPIO) * - *************************************************/ - bfin_write_PORTH_FER(0x3F03); - - /************************************************ - * set port H MUX to configure PH8-PH13 * - * 1st Function (MUX = 00) (bits 16-27 == 0) * - * Set to address signals A4-A9 * - *************************************************/ - bfin_write_PORTH_MUX(0); - - /************************************************ - * set port H direction register * - * enable PH8-PH13 as outputs * - *************************************************/ - bfin_write_PORTH_DIR_SET(0x3F00); - - /* Port I: PI0 - PH14 == A10 - A24 - * address lines of the parallel asynchronous memory interface - */ - - /************************************************ - * set port I function enable register * - * configure PI0-PI14 as peripheral (not GPIO) * - *************************************************/ - bfin_write_PORTI_FER(0x7fff); - - /************************************************** - * set PORT I MUX to configure PI14-PI0 as * - * 1st Function (MUX=00) - address signals A10-A24 * - ***************************************************/ - bfin_write_PORTI_MUX(0); - - /**************************************** - * set PORT I direction register * - * enable PI0 - PI14 as outputs * - *****************************************/ - bfin_write_PORTI_DIR_SET(0x7fff); - - return 0; + /* Set async addr lines as peripheral */ + const unsigned short pins[] = { + P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12, + P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, + P_A21, P_A22, P_A23, P_A24, 0 + }; + return peripheral_request_list(pins, "async"); } int board_eth_init(bd_t *bis) |