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authorSimon Glass <sjg@chromium.org>2013-03-11 06:08:10 +0000
committerSimon Glass <sjg@chromium.org>2013-03-19 08:45:37 -0700
commit7ea01d1808b349011f3442b40138f7f8a7c58aa6 (patch)
tree03395a866e4fe37a585804a0470ca6138c248074 /board/chromebook-x86
parent192868b0614e68d165fffe9996c6c45db1c47fcb (diff)
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x86: Add FDT SPI node for link
Add a memory-mapped 8GB SPI chip. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'board/chromebook-x86')
-rw-r--r--board/chromebook-x86/dts/link.dts11
1 files changed, 11 insertions, 0 deletions
diff --git a/board/chromebook-x86/dts/link.dts b/board/chromebook-x86/dts/link.dts
index ae8217d..d0738cb 100644
--- a/board/chromebook-x86/dts/link.dts
+++ b/board/chromebook-x86/dts/link.dts
@@ -21,4 +21,15 @@
chosen { };
memory { device_type = "memory"; reg = <0 0>; };
+
+ spi {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ich9";
+ spi-flash@0 {
+ reg = <0>;
+ compatible = "winbond,w25q64", "spi-flash";
+ memory-map = <0xff800000 0x00800000>;
+ };
+ };
};