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authorEd Swarthout <Ed.Swarthout@freescale.com>2007-08-21 09:38:59 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2007-08-29 00:11:59 -0500
commit4bf4abb8a4e9955556b120a1aafa30c03e74032a (patch)
treeec0b1c3d05500e7c3592b2adcee63d70469a217a /board/cds/mpc8548cds/mpc8548cds.c
parent7a1ac419fa0d2d23ddd08bd61d16896a9f33c933 (diff)
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8548cds fixes
Restore CONFIG_EXTRA_ENV_SETTINGS definition which contains the correct consoledev needed for linux boot. Standardize on fdt{file,addr} var to hold dtb file name. Set PCI inbound memory region from CFG_MEMORY_{BUS,PHYS}. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Diffstat (limited to 'board/cds/mpc8548cds/mpc8548cds.c')
-rw-r--r--board/cds/mpc8548cds/mpc8548cds.c14
1 files changed, 11 insertions, 3 deletions
diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c
index 48753d7..796ae22 100644
--- a/board/cds/mpc8548cds/mpc8548cds.c
+++ b/board/cds/mpc8548cds/mpc8548cds.c
@@ -362,20 +362,28 @@ pci_init_board(void)
);
- /* outbound memory */
+ /* inbound */
pci_set_region(hose->regions + 0,
+ CFG_PCI_MEMORY_BUS,
+ CFG_PCI_MEMORY_PHYS,
+ CFG_PCI_MEMORY_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+
+ /* outbound memory */
+ pci_set_region(hose->regions + 1,
CFG_PCI1_MEM_BASE,
CFG_PCI1_MEM_PHYS,
CFG_PCI1_MEM_SIZE,
PCI_REGION_MEM);
/* outbound io */
- pci_set_region(hose->regions + 1,
+ pci_set_region(hose->regions + 2,
CFG_PCI1_IO_BASE,
CFG_PCI1_IO_PHYS,
CFG_PCI1_IO_SIZE,
PCI_REGION_IO);
- hose->region_count = 2;
+ hose->region_count = 3;
/* relocate config table pointers */
hose->config_table = \