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authorEd Swarthout <Ed.Swarthout@freescale.com>2007-07-27 01:50:52 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2007-08-14 01:39:00 -0500
commitf2cff6b104f82b993bef6086ce0c97159bbe1add (patch)
treea8577ba96ab85cb959e2d7160bd949300443c8e1 /board/cds/mpc8548cds/config.mk
parent837f1ba05cfb248aba5ab8e1fb1bfeefa07d5962 (diff)
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8548cds PCIE support.
Make the early L1 cache stack region guarded to prevent speculative fetches outside the locked range. Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions. init.S whitespace cleanup. Allow TEXT_BASE value to be specified on command line. This allows it to be set to 0xfffc0000 which cuts the uboot binary in half. Clear and enable lbc and ecm errors. Update last_busno in device-tree for pci and pcie. Remove load of obsolete cpu/mpc85xx/pci.0 Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'board/cds/mpc8548cds/config.mk')
-rw-r--r--board/cds/mpc8548cds/config.mk4
1 files changed, 3 insertions, 1 deletions
diff --git a/board/cds/mpc8548cds/config.mk b/board/cds/mpc8548cds/config.mk
index 242a676..b23bc87 100644
--- a/board/cds/mpc8548cds/config.mk
+++ b/board/cds/mpc8548cds/config.mk
@@ -1,5 +1,5 @@
#
-# Copyright 2004 Freescale Semiconductor.
+# Copyright 2004, 2007 Freescale Semiconductor.
#
# See file CREDITS for list of people who contributed to this
# project.
@@ -23,7 +23,9 @@
#
# mpc8548cds board
#
+ifndef TEXT_BASE
TEXT_BASE = 0xfff80000
+endif
PLATFORM_CPPFLAGS += -DCONFIG_E500=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1