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authorWolfgang Denk <wd@denx.de>2007-08-14 09:53:38 +0200
committerWolfgang Denk <wd@denx.de>2007-08-14 09:53:38 +0200
commitbf9583e544e867b0b49d72d74644a13486d68123 (patch)
tree9ea8eb066af58692102f9eebab6cd9f7466d37c4 /board/cds/common/via.c
parent85eb5caf6b906f7ec5b54814e8c7c74f55986bb7 (diff)
parent7f3f2bd2dc08e0b05e185662ca2e2d283757104a (diff)
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Merge with /home/wd/git/u-boot/custodian/u-boot-mpc85xx
Diffstat (limited to 'board/cds/common/via.c')
-rw-r--r--board/cds/common/via.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/board/cds/common/via.c b/board/cds/common/via.c
index e79bd02..4a63d77 100644
--- a/board/cds/common/via.c
+++ b/board/cds/common/via.c
@@ -28,11 +28,16 @@ void mpc85xx_config_via(struct pci_controller *hose,
pci_dev_t dev, struct pci_config_table *tab)
{
pci_dev_t bridge;
+ unsigned int cmdstat;
/* Enable USB and IDE functions */
pci_hose_write_config_byte(hose, dev, 0x48, 0x08);
- pciauto_config_device(hose, dev);
+ pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat);
+ cmdstat |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY| PCI_COMMAND_MASTER;
+ pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
/*
* Force the backplane P2P bridge to have a window
@@ -40,7 +45,7 @@ void mpc85xx_config_via(struct pci_controller *hose,
* This allows legacy I/O (i8259, etc) on the VIA
* southbridge to be accessed.
*/
- bridge = PCI_BDF(0,17,0);
+ bridge = PCI_BDF(0,BRIDGE_ID,0);
pci_hose_write_config_byte(hose, bridge, PCI_IO_BASE, 0);
pci_hose_write_config_word(hose, bridge, PCI_IO_BASE_UPPER16, 0);
pci_hose_write_config_byte(hose, bridge, PCI_IO_LIMIT, 0x10);