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| author | Timur Tabi <timur@freescale.com> | 2010-12-03 13:03:45 -0600 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-12-13 10:05:51 -0600 |
| commit | fdb9482b42c28d314317ea0118181b1f32a7c689 (patch) | |
| tree | d2e582477c7be74c9eec497e2a186b05cfc9af43 /board/bf561-acvilon | |
| parent | 2c1764efc2872fc944d0d580e911168c0a231f8c (diff) | |
| download | u-boot-imx-fdb9482b42c28d314317ea0118181b1f32a7c689.zip u-boot-imx-fdb9482b42c28d314317ea0118181b1f32a7c689.tar.gz u-boot-imx-fdb9482b42c28d314317ea0118181b1f32a7c689.tar.bz2 | |
p1022ds: fix switching of DIU/LBC signals
On the P1022, the pins which drive the video display (DIU) are muxed with the
local bus controller (LBC), so if the DIU is active, the pins need to be
temporarily muxed to LBC whenever accessing NOR flash.
The code which handled this transition is checking and changing the wrong
bits in PMUXCR.
Also add a follow-up read after a write to NOR flash if we're going to
mux back to DIU after the write, as described in the P1022 RM.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/bf561-acvilon')
0 files changed, 0 insertions, 0 deletions