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authorWolfgang Denk <wd@denx.de>2008-10-19 02:35:50 +0200
committerWolfgang Denk <wd@denx.de>2008-10-21 11:25:39 +0200
commit8ed44d91c8122d00368523b0b746691c895d3b3c (patch)
tree7e2ff620c5b378aa82208c3e7a99e2a56570ddb7 /board/bf537-stamp
parent08ef89ecd174969b3544f3f0c7cd1de3c57f737b (diff)
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Cleanup: fix "MHz" spelling
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/bf537-stamp')
-rw-r--r--board/bf537-stamp/post-memory.c24
1 files changed, 12 insertions, 12 deletions
diff --git a/board/bf537-stamp/post-memory.c b/board/bf537-stamp/post-memory.c
index 7c36c81..889aa5c 100644
--- a/board/bf537-stamp/post-memory.c
+++ b/board/bf537-stamp/post-memory.c
@@ -27,18 +27,18 @@ const int pll[CCLK_NUM][SCLK_NUM][2] = {
{{4, 1}, {4, 2}, {4, 4}} /* CCLK = 100M */
};
const char *const log[CCLK_NUM][SCLK_NUM] = {
- {"CCLK-500Mhz SCLK-125Mhz: Writing...\0",
- "CCLK-500Mhz SCLK-100Mhz: Writing...\0",
- "CCLK-500Mhz SCLK- 50Mhz: Writing...\0",},
- {"CCLK-400Mhz SCLK-100Mhz: Writing...\0",
- "CCLK-400Mhz SCLK- 80Mhz: Writing...\0",
- "CCLK-400Mhz SCLK- 50Mhz: Writing...\0",},
- {"CCLK-200Mhz SCLK-100Mhz: Writing...\0",
- "CCLK-200Mhz SCLK- 50Mhz: Writing...\0",
- "CCLK-200Mhz SCLK- 40Mhz: Writing...\0",},
- {"CCLK-100Mhz SCLK-100Mhz: Writing...\0",
- "CCLK-100Mhz SCLK- 50Mhz: Writing...\0",
- "CCLK-100Mhz SCLK- 25Mhz: Writing...\0",},
+ {"CCLK-500MHz SCLK-125MHz: Writing...\0",
+ "CCLK-500MHz SCLK-100MHz: Writing...\0",
+ "CCLK-500MHz SCLK- 50MHz: Writing...\0",},
+ {"CCLK-400MHz SCLK-100MHz: Writing...\0",
+ "CCLK-400MHz SCLK- 80MHz: Writing...\0",
+ "CCLK-400MHz SCLK- 50MHz: Writing...\0",},
+ {"CCLK-200MHz SCLK-100MHz: Writing...\0",
+ "CCLK-200MHz SCLK- 50MHz: Writing...\0",
+ "CCLK-200MHz SCLK- 40MHz: Writing...\0",},
+ {"CCLK-100MHz SCLK-100MHz: Writing...\0",
+ "CCLK-100MHz SCLK- 50MHz: Writing...\0",
+ "CCLK-100MHz SCLK- 25MHz: Writing...\0",},
};
int memory_post_test(int flags)