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author | Stefan Roese <sr@denx.de> | 2008-10-21 11:43:08 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2008-10-21 11:43:08 +0200 |
commit | f61f1e150c84f5b9347fca79a4bc5f2286c545d2 (patch) | |
tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /board/bf533-stamp | |
parent | ec081c2c190148b374e86a795fb6b1c49caeb549 (diff) | |
parent | f82642e33899766892499b163e60560fbbf87773 (diff) | |
download | u-boot-imx-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.zip u-boot-imx-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.tar.gz u-boot-imx-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.tar.bz2 |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'board/bf533-stamp')
-rw-r--r-- | board/bf533-stamp/bf533-stamp.c | 6 | ||||
-rw-r--r-- | board/bf533-stamp/u-boot.lds.S | 4 |
2 files changed, 5 insertions, 5 deletions
diff --git a/board/bf533-stamp/bf533-stamp.c b/board/bf533-stamp/bf533-stamp.c index 7a17dfa..a113c40 100644 --- a/board/bf533-stamp/bf533-stamp.c +++ b/board/bf533-stamp/bf533-stamp.c @@ -56,11 +56,11 @@ phys_size_t initdram(int board_type) (" tRCD:%d Cycles; tRP:%d Cycles; tRAS:%d Cycles; tWR:%d Cycles; " "CAS Latency:%d cycles\n", (SDRAM_tRCD >> 15), (SDRAM_tRP >> 11), (SDRAM_tRAS >> 6), (SDRAM_tWR >> 19), (SDRAM_CL >> 2)); - printf("SDRAM Begin: 0x%x\n", CFG_SDRAM_BASE); + printf("SDRAM Begin: 0x%x\n", CONFIG_SYS_SDRAM_BASE); printf("Bank size = %d MB\n", 128); #endif - gd->bd->bi_memstart = CFG_SDRAM_BASE; - gd->bd->bi_memsize = CFG_MAX_RAM_SIZE; + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; return (gd->bd->bi_memsize); } diff --git a/board/bf533-stamp/u-boot.lds.S b/board/bf533-stamp/u-boot.lds.S index 4e7fd7c..97ebd79 100644 --- a/board/bf533-stamp/u-boot.lds.S +++ b/board/bf533-stamp/u-boot.lds.S @@ -36,7 +36,7 @@ * for different CPU's which may lack non-cache L1 data. */ #ifndef L1_DATA_B_SRAM -# define L1_DATA_B_SRAM CFG_MONITOR_BASE +# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE # define L1_DATA_B_SRAM_SIZE 0 #endif @@ -45,7 +45,7 @@ OUTPUT_ARCH(bfin) /* The 0xC offset is so we don't clobber the tiny LDR jump block. */ MEMORY { - ram : ORIGIN = CFG_MONITOR_BASE, LENGTH = CFG_MONITOR_LEN + ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN l1_code : ORIGIN = L1_INST_SRAM+0xC, LENGTH = L1_INST_SRAM_SIZE l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE } |