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author | Aubrey Li <aubrey.adi@gmail.com> | 2007-03-12 00:25:14 +0800 |
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committer | Aubrey Li <aubrey.adi@gmail.com> | 2007-03-12 00:25:14 +0800 |
commit | 8440bb14581a294375c34b91b42512f9753d1130 (patch) | |
tree | 2af94c8cdb0bedf0501affd4db35d6c6faee317c /board/bf533-stamp/spi.c | |
parent | 8db13d63157811c839d15a313d9f2d2f5fd10af3 (diff) | |
download | u-boot-imx-8440bb14581a294375c34b91b42512f9753d1130.zip u-boot-imx-8440bb14581a294375c34b91b42512f9753d1130.tar.gz u-boot-imx-8440bb14581a294375c34b91b42512f9753d1130.tar.bz2 |
[Blackfin][PATCH] code cleanup
Diffstat (limited to 'board/bf533-stamp/spi.c')
-rw-r--r-- | board/bf533-stamp/spi.c | 39 |
1 files changed, 20 insertions, 19 deletions
diff --git a/board/bf533-stamp/spi.c b/board/bf533-stamp/spi.c index 1b585aa..d30750f 100644 --- a/board/bf533-stamp/spi.c +++ b/board/bf533-stamp/spi.c @@ -3,6 +3,7 @@ ****************************************************************************/ #include <common.h> #include <linux/ctype.h> +#include <asm/io.h> #if defined(CONFIG_SPI) @@ -152,7 +153,7 @@ void SendSingleCommand(const int iCommand) /*sends the actual command to the SPI TX register */ *pSPI_TDBR = iCommand; - __builtin_bfin_ssync(); + sync(); /*The SPI status register will be polled to check the SPIF bit */ Wait_For_SPIF(); @@ -173,7 +174,7 @@ void SetupSPI(const int spi_setting) *pSPI_FLG = 0xFB04; *pSPI_BAUD = CONFIG_SPI_BAUD; *pSPI_CTL = spi_setting; - __builtin_bfin_ssync(); + sync(); } void SPI_OFF(void) @@ -182,7 +183,7 @@ void SPI_OFF(void) *pSPI_CTL = 0x0400; /* disable SPI */ *pSPI_FLG = 0; *pSPI_BAUD = 0; - __builtin_bfin_ssync(); + sync(); udelay(CONFIG_CCLK_HZ / 50000000); } @@ -240,10 +241,10 @@ char ReadStatusRegister(void) SetupSPI((COMMON_SPI_SETTINGS | TIMOD01)); /* Turn on the SPI */ *pSPI_TDBR = SPI_RDSR; /* send instruction to read status register */ - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /*wait until the instruction has been sent */ *pSPI_TDBR = 0; /*send dummy to receive the status register */ - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /*wait until the data has been sent */ status_register = *pSPI_RDBR; /*read the status register */ @@ -304,18 +305,18 @@ ERROR_CODE EraseBlock(int nBlock) /* Send the erase block command to the flash followed by the 24 address */ /* to point to the start of a sector. */ *pSPI_TDBR = SPI_SE; - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); ShiftValue = (ulSectorOff >> 16); /* Send the highest byte of the 24 bit address at first */ *pSPI_TDBR = ShiftValue; - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /* Wait until the instruction has been sent */ ShiftValue = (ulSectorOff >> 8); /* Send the middle byte of the 24 bit address at second */ *pSPI_TDBR = ShiftValue; - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /* Wait until the instruction has been sent */ *pSPI_TDBR = ulSectorOff; /* Send the lowest byte of the 24 bit address finally */ - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /* Wait until the instruction has been sent */ /*Turns off the SPI */ @@ -350,25 +351,25 @@ ERROR_CODE ReadData(unsigned long ulStart, long lCount, int *pnData) SetupSPI((COMMON_SPI_SETTINGS | TIMOD01)); *pSPI_TDBR = SPI_READ; /* Send the read command to SPI device */ - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /* Wait until the instruction has been sent */ ShiftValue = (ulStart >> 16); /* Send the highest byte of the 24 bit address at first */ *pSPI_TDBR = ShiftValue; /* Send the byte to the SPI device */ - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /* Wait until the instruction has been sent */ ShiftValue = (ulStart >> 8); /* Send the middle byte of the 24 bit address at second */ *pSPI_TDBR = ShiftValue; /* Send the byte to the SPI device */ - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /* Wait until the instruction has been sent */ *pSPI_TDBR = ulStart; /* Send the lowest byte of the 24 bit address finally */ - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /* Wait until the instruction has been sent */ /* After the SPI device address has been placed on the MOSI pin the data can be */ /* received on the MISO pin. */ for (i = 0; i < lCount; i++) { *pSPI_TDBR = 0; /*send dummy */ - __builtin_bfin_ssync(); + sync(); while (!(*pSPI_STAT & RXS)) ; *cnData++ = *pSPI_RDBR; /*read */ @@ -405,26 +406,26 @@ ERROR_CODE WriteFlash(unsigned long ulStartAddr, long lTransferCount, /* Third, the 24 bit address will be shifted out the SPI MOSI bytewise. */ SetupSPI((COMMON_SPI_SETTINGS | TIMOD01)); /* Turns the SPI on */ *pSPI_TDBR = SPI_PP; - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /*wait until the instruction has been sent */ ulWAddr = (ulStartAddr >> 16); *pSPI_TDBR = ulWAddr; - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /*wait until the instruction has been sent */ ulWAddr = (ulStartAddr >> 8); *pSPI_TDBR = ulWAddr; - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /*wait until the instruction has been sent */ ulWAddr = ulStartAddr; *pSPI_TDBR = ulWAddr; - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /*wait until the instruction has been sent */ /* Fourth, maximum number of 256 bytes will be taken from the Buffer */ /* and sent to the SPI device. */ for (i = 0; (i < lTransferCount) && (i < 256); i++, lWTransferCount++) { iData = *temp; *pSPI_TDBR = iData; - __builtin_bfin_ssync(); + sync(); Wait_For_SPIF(); /*wait until the instruction has been sent */ temp++; } |