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author | Tim Harvey <tharvey@gateworks.com> | 2014-08-20 23:31:11 -0700 |
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committer | Stefano Babic <sbabic@denx.de> | 2014-09-09 15:13:25 +0200 |
commit | c91e4b8b082b54faf329e5d9bbe7c2c588af6654 (patch) | |
tree | baa52325403daddb07601b150172b2b95ac96c69 /board/bf527-sdp/MAINTAINERS | |
parent | 5b94b6f6b28fcb93b3440e12282e3384e17972c8 (diff) | |
download | u-boot-imx-c91e4b8b082b54faf329e5d9bbe7c2c588af6654.zip u-boot-imx-c91e4b8b082b54faf329e5d9bbe7c2c588af6654.tar.gz u-boot-imx-c91e4b8b082b54faf329e5d9bbe7c2c588af6654.tar.bz2 |
imx: ventana: base SPL MMDC calibration on width and size not board
The IMX6 MMDC calibration registers depend on propagation delay and capacitive
loading between the SoC's MMDC and the DDR3 chips. On the Ventana boards the
board layout varies little in trace-lengths such that propagation delays are
irrelevant thus we can simply things by using calibration values obtained
from various board layouts based on a common SoC and DDR chip configuration.
This eliminates board-model from being needed allowing more flexibility. These
values were tested on a large sample size of Gateworks Ventana boards ranging
in layout, and memory configuration over the entire temperature range supported.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Diffstat (limited to 'board/bf527-sdp/MAINTAINERS')
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