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authorPo Liu <po.liu@freescale.com>2014-01-10 10:10:59 +0800
committerYork Sun <yorksun@freescale.com>2014-01-21 13:42:40 -0800
commiteb6b458cef28c86603d56a27b9ee699b13c60c14 (patch)
treeae4973790cc7d439f19255db39a5156c91120b22 /board/barco
parent6609916efb74724e53db368dd48bfb290d4d9f4c (diff)
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powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL
Using the TPL/SPL method to booting from 8k page NAND flash. - Add 256kB size SRAM tlb for second step booting; - Add spl.c for TPL image boot; - Add spl_minimal.c for minimal SPL image; - Add C29XPCIE_NAND configure; - Modify C29XPCIE.h for nand config and enviroment; Signed-off-by: Po Liu <Po.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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