Merge git://git.denx.de/u-boot into x1

Conflicts:

	drivers/usb/usb_ohci.c

4 files changed, 70 insertions, 70 deletions

diff --git a/board/barco/barco.c b/board/barco/barco.c
index f8b2084..ed35572 100644
--- a/board/barco/barco.c
+++ b/board/barco/barco.c
@@ -90,7 +90,7 @@ phys_size_t initdram (int board_type)
 	long mear1;
 	long emear1;
 
-	size = get_ram_size (CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
+	size = get_ram_size (CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
 
 	new_bank0_end = size - 1;
 	mear1 = mpc824x_mpc107_getreg (MEAR1);
@@ -188,14 +188,14 @@ unsigned update_flash (unsigned char *buf)
 unsigned scan_flash (void)
 {
 	char section[] =  "kernel";
-	int cfgFileLen  =  (CFG_FLASH_ERASE_SECTOR_LENGTH >> 1);
+	int cfgFileLen  =  (CONFIG_SYS_FLASH_ERASE_SECTOR_LENGTH >> 1);
 	int sectionPtr  = 0;
 	int foundItem   = 0; /* 0: None, 1: section found, 2: "=" found */
 	int bufPtr;
 	unsigned char *buf;
 
-	buf = (unsigned char*)(CFG_FLASH_RANGE_BASE + CFG_FLASH_RANGE_SIZE \
-			- CFG_FLASH_ERASE_SECTOR_LENGTH);
+	buf = (unsigned char*)(CONFIG_SYS_FLASH_RANGE_BASE + CONFIG_SYS_FLASH_RANGE_SIZE \
+			- CONFIG_SYS_FLASH_ERASE_SECTOR_LENGTH);
 	for (bufPtr = 0; bufPtr < cfgFileLen; ++bufPtr) {
 		if ((buf[bufPtr]==0xFF) && (*(int*)(buf+bufPtr)==0xFFFFFFFF)) {
 			return BOOT_DEFAULT;
@@ -236,14 +236,14 @@ TSBootInfo* find_boot_info (void)
 
 	switch (bootimage) {
 	case TRY_WORKING:
-		info->address = CFG_WORKING_KERNEL_ADDRESS;
+		info->address = CONFIG_SYS_WORKING_KERNEL_ADDRESS;
 		break;
 	case BOOT_WORKING :
-		info->address = CFG_WORKING_KERNEL_ADDRESS;
+		info->address = CONFIG_SYS_WORKING_KERNEL_ADDRESS;
 		break;
 	case BOOT_DEFAULT:
 	default:
-		info->address= CFG_DEFAULT_KERNEL_ADDRESS;
+		info->address= CONFIG_SYS_DEFAULT_KERNEL_ADDRESS;
 
 	}
 	info->size = *((unsigned int *)(info->address ));
diff --git a/board/barco/barco_svc.h b/board/barco/barco_svc.h
index bd924f2..e103260 100644
--- a/board/barco/barco_svc.h
+++ b/board/barco/barco_svc.h
@@ -38,16 +38,16 @@
 #include <asm/io.h>
 
 /* Defines for the barcohydra board */
-#ifndef CFG_FLASH_ERASE_SECTOR_LENGTH
-#define CFG_FLASH_ERASE_SECTOR_LENGTH (0x10000)
+#ifndef CONFIG_SYS_FLASH_ERASE_SECTOR_LENGTH
+#define CONFIG_SYS_FLASH_ERASE_SECTOR_LENGTH (0x10000)
 #endif
 
-#ifndef CFG_DEFAULT_KERNEL_ADDRESS
-#define CFG_DEFAULT_KERNEL_ADDRESS (CFG_FLASH_BASE + 0x30000)
+#ifndef CONFIG_SYS_DEFAULT_KERNEL_ADDRESS
+#define CONFIG_SYS_DEFAULT_KERNEL_ADDRESS (CONFIG_SYS_FLASH_BASE + 0x30000)
 #endif
 
-#ifndef CFG_WORKING_KERNEL_ADDRESS
-#define CFG_WORKING_KERNEL_ADDRESS (0xFFE00000)
+#ifndef CONFIG_SYS_WORKING_KERNEL_ADDRESS
+#define CONFIG_SYS_WORKING_KERNEL_ADDRESS (0xFFE00000)
 #endif
 
 
diff --git a/board/barco/early_init.S b/board/barco/early_init.S
index 07dafb7..531dcdf 100644
--- a/board/barco/early_init.S
+++ b/board/barco/early_init.S
@@ -32,68 +32,68 @@
 
 #if defined(USE_DINK32)
   /* We are running from RAM, so do not clear the MCCR1_MEMGO bit! */
-  #define MCCR1VAL ((CFG_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CFG_ROMFAL << MCCR1_ROMFAL_SHIFT) | MCCR1_MEMGO)
+  #define MCCR1VAL ((CONFIG_SYS_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CONFIG_SYS_ROMFAL << MCCR1_ROMFAL_SHIFT) | MCCR1_MEMGO)
 #else
-  #define MCCR1VAL (CFG_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CFG_ROMFAL << MCCR1_ROMFAL_SHIFT)
+  #define MCCR1VAL (CONFIG_SYS_ROMNAL << MCCR1_ROMNAL_SHIFT) | (CONFIG_SYS_ROMFAL << MCCR1_ROMFAL_SHIFT)
 #endif
 
 	.text
 
 	/* Values to program into memory controller registers */
 tbl:	.long	MCCR1, MCCR1VAL
-	.long	MCCR2, CFG_REFINT << MCCR2_REFINT_SHIFT
+	.long	MCCR2, CONFIG_SYS_REFINT << MCCR2_REFINT_SHIFT
 	.long	MCCR3
-	.long	(((CFG_BSTOPRE & 0x000000f0) >> 4) << MCCR3_BSTOPRE2TO5_SHIFT) | \
-		(CFG_REFREC << MCCR3_REFREC_SHIFT) | \
-		(CFG_RDLAT  << MCCR3_RDLAT_SHIFT)
+	.long	(((CONFIG_SYS_BSTOPRE & 0x000000f0) >> 4) << MCCR3_BSTOPRE2TO5_SHIFT) | \
+		(CONFIG_SYS_REFREC << MCCR3_REFREC_SHIFT) | \
+		(CONFIG_SYS_RDLAT  << MCCR3_RDLAT_SHIFT)
 	.long	MCCR4
-	.long	(CFG_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CFG_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \
-		(CFG_REGISTERD_TYPE_BUFFER << 20) | \
-		(((CFG_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \
-		((CFG_SDMODE_CAS_LAT << 4) | (CFG_SDMODE_WRAP << 3) | \
-		(CFG_SDMODE_BURSTLEN) << MCCR4_SDMODE_SHIFT) | \
-		(CFG_ACTTORW << MCCR4_ACTTORW_SHIFT) | \
-		((CFG_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT )
+	.long	(CONFIG_SYS_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CONFIG_SYS_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \
+		(CONFIG_SYS_REGISTERD_TYPE_BUFFER << 20) | \
+		(((CONFIG_SYS_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \
+		((CONFIG_SYS_SDMODE_CAS_LAT << 4) | (CONFIG_SYS_SDMODE_WRAP << 3) | \
+		(CONFIG_SYS_SDMODE_BURSTLEN) << MCCR4_SDMODE_SHIFT) | \
+		(CONFIG_SYS_ACTTORW << MCCR4_ACTTORW_SHIFT) | \
+		((CONFIG_SYS_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT )
 	.long	MSAR1
-	.long	(((CFG_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  0) | \
-		(((CFG_BANK1_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  8) | \
-		(((CFG_BANK2_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
-		(((CFG_BANK3_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
+	.long	(((CONFIG_SYS_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  0) | \
+		(((CONFIG_SYS_BANK1_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  8) | \
+		(((CONFIG_SYS_BANK2_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
+		(((CONFIG_SYS_BANK3_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
 	.long	EMSAR1
-	.long	(((CFG_BANK0_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  0) | \
-		(((CFG_BANK1_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  8) | \
-		(((CFG_BANK2_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
-		(((CFG_BANK3_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
+	.long	(((CONFIG_SYS_BANK0_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  0) | \
+		(((CONFIG_SYS_BANK1_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  8) | \
+		(((CONFIG_SYS_BANK2_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
+		(((CONFIG_SYS_BANK3_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
 	.long	MSAR2
-	.long	(((CFG_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  0) | \
-		(((CFG_BANK5_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  8) | \
-		(((CFG_BANK6_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
-		(((CFG_BANK7_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
+	.long	(((CONFIG_SYS_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  0) | \
+		(((CONFIG_SYS_BANK5_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  8) | \
+		(((CONFIG_SYS_BANK6_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
+		(((CONFIG_SYS_BANK7_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
 	.long	EMSAR2
-	.long	(((CFG_BANK4_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  0) | \
-		(((CFG_BANK5_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  8) | \
-		(((CFG_BANK6_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
-		(((CFG_BANK7_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
+	.long	(((CONFIG_SYS_BANK4_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  0) | \
+		(((CONFIG_SYS_BANK5_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  8) | \
+		(((CONFIG_SYS_BANK6_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
+		(((CONFIG_SYS_BANK7_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
 	.long	MEAR1
-	.long	(((CFG_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  0) | \
-		(((CFG_BANK1_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  8) | \
-		(((CFG_BANK2_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
-		(((CFG_BANK3_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
+	.long	(((CONFIG_SYS_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  0) | \
+		(((CONFIG_SYS_BANK1_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  8) | \
+		(((CONFIG_SYS_BANK2_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
+		(((CONFIG_SYS_BANK3_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
 	.long	EMEAR1
-	.long	(((CFG_BANK0_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  0) | \
-		(((CFG_BANK1_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  8) | \
-		(((CFG_BANK2_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
-		(((CFG_BANK3_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
+	.long	(((CONFIG_SYS_BANK0_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  0) | \
+		(((CONFIG_SYS_BANK1_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  8) | \
+		(((CONFIG_SYS_BANK2_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
+		(((CONFIG_SYS_BANK3_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
 	.long	MEAR2
-	.long	(((CFG_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  0) | \
-		(((CFG_BANK5_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  8) | \
-		(((CFG_BANK6_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
-		(((CFG_BANK7_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
+	.long	(((CONFIG_SYS_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  0) | \
+		(((CONFIG_SYS_BANK5_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) <<  8) | \
+		(((CONFIG_SYS_BANK6_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \
+		(((CONFIG_SYS_BANK7_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24)
 	.long	EMEAR2
-	.long	(((CFG_BANK4_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  0) | \
-		(((CFG_BANK5_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  8) | \
-		(((CFG_BANK6_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
-		(((CFG_BANK7_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
+	.long	(((CONFIG_SYS_BANK4_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  0) | \
+		(((CONFIG_SYS_BANK5_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) <<  8) | \
+		(((CONFIG_SYS_BANK6_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \
+		(((CONFIG_SYS_BANK7_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24)
 	.long	0
 
 
@@ -123,7 +123,7 @@ loop:	lwz	r1, 4(r5)
 	/* set bank enable bits */
 	lis	r0, MBER@h
 	ori	r0, 0, MBER@l
-	li	r1, CFG_BANK_ENABLE
+	li	r1, CONFIG_SYS_BANK_ENABLE
 	stwbrx	r0, 0, r3
 	eieio
 	stb	r1, 0(r4)
@@ -145,8 +145,8 @@ delay:	bdnz	delay
 	eieio
 
 	/* set up stack pointer */
-	lis	r1, CFG_INIT_SP_OFFSET@h
-	ori	r1, r1, CFG_INIT_SP_OFFSET@l
+	lis	r1, CONFIG_SYS_INIT_SP_OFFSET@h
+	ori	r1, r1, CONFIG_SYS_INIT_SP_OFFSET@l
 
 	mtlr	r10
 	blr
diff --git a/board/barco/flash.c b/board/barco/flash.c
index 53fc58c..c9efb15 100644
--- a/board/barco/flash.c
+++ b/board/barco/flash.c
@@ -56,11 +56,11 @@
 #define ROM_CS0_START	0xFF800000
 #define ROM_CS1_START	0xFF000000
 
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips    */
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips    */
 
 #if defined(CONFIG_ENV_IS_IN_FLASH)
 # ifndef  CONFIG_ENV_ADDR
-#  define CONFIG_ENV_ADDR  (CFG_FLASH_BASE + CONFIG_ENV_OFFSET)
+#  define CONFIG_ENV_ADDR  (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
 # endif
 # ifndef  CONFIG_ENV_SIZE
 #  define CONFIG_ENV_SIZE  CONFIG_ENV_SECT_SIZE
@@ -140,10 +140,10 @@ unsigned long flash_init(void)
 {
 	unsigned long i;
 	unsigned char j;
-	static const ulong flash_banks[] = CFG_FLASH_BANKS;
+	static const ulong flash_banks[] = CONFIG_SYS_FLASH_BANKS;
 
 	/* Init: no FLASHes known */
-	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++){
+	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++){
 		flash_info_t * const pflinfo = &flash_info[i];
 		pflinfo->flash_id = FLASH_UNKNOWN;
 		pflinfo->size = 0;
@@ -217,10 +217,10 @@ unsigned long flash_init(void)
 				break;
 		}
 		/* Protect monitor and environment sectors */
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
 		flash_protect(FLAG_PROTECT_SET,
-				CFG_MONITOR_BASE,
-				CFG_MONITOR_BASE + monitor_flash_len - 1,
+				CONFIG_SYS_MONITOR_BASE,
+				CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
 				&flash_info[0]);
 #endif
 
@@ -458,7 +458,7 @@ int flash_erase(flash_info_t *info, int s_first, int s_last)
 	addr = (FLASH_WORD_SIZE *)(info->start[0] + (
 				(info->start[l_sect] - info->start[0]) << sh8b));
 	while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) {
-		if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+		if ((now = get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
 			printf ("Timeout\n");
 			return 1;
 		}
@@ -599,7 +599,7 @@ static int write_word (flash_info_t *info, ulong dest, ulong data)
 		start = get_timer (0);
 		while ((dest2[i << sh8b] & (FLASH_WORD_SIZE)0x00800080) !=
 				(data2[i] & (FLASH_WORD_SIZE)0x00800080)) {
-			if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+			if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
 				return (1);
 			}
 		}