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| author | Hans de Goede <hdegoede@redhat.com> | 2014-10-22 16:47:45 +0800 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2014-10-24 09:35:39 +0200 |
| commit | e373aad32a06110e60af52c58b32d32fe8417bbd (patch) | |
| tree | ce32da006dfeccdc5d020757877629558dfb5c9e /board/barco/titanium/MAINTAINERS | |
| parent | 8ebe4f429266a7cb9011f5b3ab51226297f41210 (diff) | |
| download | u-boot-imx-e373aad32a06110e60af52c58b32d32fe8417bbd.zip u-boot-imx-e373aad32a06110e60af52c58b32d32fe8417bbd.tar.gz u-boot-imx-e373aad32a06110e60af52c58b32d32fe8417bbd.tar.bz2 | |
ARM: sunxi: Add support for R_PIO gpio banks
The A31, A23 and later SoCs have an extra pin controller, called CPUs_PIO
or R_PIO, which handles pin banks L and beyond.
Also add a clear description about SUNXI_GPIO_BANKS, stating it only
counts the number of pin banks in the _main_ pin controller.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[wens@csie.org: expanded commit message]
[wens@csie.org: add pin bank M and expand comments]
[wens@csie.org: add comment on SUNXI_GPIO_BANKS macro]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Diffstat (limited to 'board/barco/titanium/MAINTAINERS')
0 files changed, 0 insertions, 0 deletions