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authorShiraz Hashim <shiraz.hashim@st.com>2012-05-07 13:06:59 +0530
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-07-07 14:07:42 +0200
commit7c885a0e5532abcd6bc802d21a7858420e5c127b (patch)
tree9441156596340e8797fd535fc30a5cead8e7decf /board/avnet
parent8337aa5c0b22bc9e1d8ae9d7b2270735670233bd (diff)
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SPEAr: explicitly select clk src for UART
UART in u-boot intends to run on 48MHz clock supplied by USB PLL. Explicitly select the intended clock source. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
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