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| author | Ye.Li <B37916@freescale.com> | 2015-04-04 14:46:05 +0800 |
|---|---|---|
| committer | Ye.Li <B37916@freescale.com> | 2015-04-05 14:21:57 +0800 |
| commit | 843c3c54af12cbf20e7bc912178e5a3628b78198 (patch) | |
| tree | df5d6112185c0f815cb6ee48080e2dbacf567dc4 /board/avionic-design | |
| parent | 0836912ef7a53d1f3d65f95556a34d03b8d65399 (diff) | |
| download | u-boot-imx-843c3c54af12cbf20e7bc912178e5a3628b78198.zip u-boot-imx-843c3c54af12cbf20e7bc912178e5a3628b78198.tar.gz u-boot-imx-843c3c54af12cbf20e7bc912178e5a3628b78198.tar.bz2 | |
MLK-10568 imx: mx7d arm2: Update LPDDR3 script to 7D_lpddr3_0_1.ds5
[The compass link for this script]
http://compass.freescale.net/livelink/livelinkfunc=ll&objid=233861153
&objAction=browse&sort=name
[Changes in the script]
1. Change the DDR freq to 528Mhz.
2. Disable ddr phy dll, just force a dll output. IC suspects the dll
in ddr phy may unlock sometimes. The side-effect is we will lost the
ability to compensate the voltage/temperature change, so it may easy
to fail at H/L temperature.
[DDR stress test result]
3 boards involved the two days stress test by using memtester tool.
One board met a kernel oops after one day test. Other two pass the
two days test.
Compared to previous DDR script, the result is much positive.
Signed-off-by: Ye.Li <B37916@freescale.com>
Diffstat (limited to 'board/avionic-design')
0 files changed, 0 insertions, 0 deletions