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| author | Wu, Josh <Josh.wu@atmel.com> | 2012-08-23 00:05:37 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-01 17:06:14 +0200 |
| commit | 2ab4c7460456470b72a27cdd1d58703494c892a8 (patch) | |
| tree | c66327436c081ab884cb49b5d60212dd6c9df824 /board/atmel | |
| parent | bdfd59aa0f00ea86b1ecf44303790eea355b8585 (diff) | |
| download | u-boot-imx-2ab4c7460456470b72a27cdd1d58703494c892a8.zip u-boot-imx-2ab4c7460456470b72a27cdd1d58703494c892a8.tar.gz u-boot-imx-2ab4c7460456470b72a27cdd1d58703494c892a8.tar.bz2 | |
at91: 9x5: change SMC config timing that both works for PMECC & non-PMECC.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Tested-by: voice.shen@atmel.com
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Diffstat (limited to 'board/atmel')
| -rw-r--r-- | board/atmel/at91sam9x5ek/at91sam9x5ek.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/board/atmel/at91sam9x5ek/at91sam9x5ek.c b/board/atmel/at91sam9x5ek/at91sam9x5ek.c index 88b3478..ae408bc 100644 --- a/board/atmel/at91sam9x5ek/at91sam9x5ek.c +++ b/board/atmel/at91sam9x5ek/at91sam9x5ek.c @@ -65,13 +65,13 @@ static void at91sam9x5ek_nand_hw_init(void) writel(csa, &matrix->ebicsa); /* Configure SMC CS3 for NAND/SmartMedia */ - writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) | - AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), &smc->cs[3].setup); - writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(4) | - AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(4), + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(5) | + AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(6), &smc->cs[3].pulse); - writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7), + writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(6), &smc->cs[3].cycle); writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | AT91_SMC_MODE_EXNW_DISABLE | @@ -80,7 +80,7 @@ static void at91sam9x5ek_nand_hw_init(void) #else /* CONFIG_SYS_NAND_DBW_8 */ AT91_SMC_MODE_DBW_8 | #endif - AT91_SMC_MODE_TDF_CYCLE(3), + AT91_SMC_MODE_TDF_CYCLE(1), &smc->cs[3].mode); writel(1 << ATMEL_ID_PIOCD, &pmc->pcer); |