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| author | Patrice Vilchez <patrice.vilchez@atmel.com> | 2008-05-27 11:15:29 +0200 |
|---|---|---|
| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-07-05 17:32:22 +0200 |
| commit | d3bcdf838e2991d58571308fa6e04ca335bc06e8 (patch) | |
| tree | ca57cd75f80b0e62ec895b20b40f303946cf466c /board/atmel/at91sam9rlek/at91sam9rlek.c | |
| parent | 19bd688484322fe62d1a66c8299da6ff9e967ff9 (diff) | |
| download | u-boot-imx-d3bcdf838e2991d58571308fa6e04ca335bc06e8.zip u-boot-imx-d3bcdf838e2991d58571308fa6e04ca335bc06e8.tar.gz u-boot-imx-d3bcdf838e2991d58571308fa6e04ca335bc06e8.tar.bz2 | |
[AT91SAM9] Fix NAND FLASH timings
Fix NAND FLASH timings for at91sam9x evaluation kits.
New timings are based on application note
"NAND Flash Support on AT91SAM9 Microcontrollers" available at
http://atmel.com/dyn/resources/prod_documents/doc6255.pdf
Signed-off-by: Patrice Vilchez <patice.vilchez@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Stelian Pop <stelian@popies.net>
Diffstat (limited to 'board/atmel/at91sam9rlek/at91sam9rlek.c')
| -rw-r--r-- | board/atmel/at91sam9rlek/at91sam9rlek.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c index 10423d2..509e7c3 100644 --- a/board/atmel/at91sam9rlek/at91sam9rlek.c +++ b/board/atmel/at91sam9rlek/at91sam9rlek.c @@ -82,13 +82,13 @@ static void at91sam9rlek_nand_hw_init(void) /* Configure SMC CS3 for NAND/SmartMedia */ at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5) | - AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5)); + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7)); + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | @@ -97,7 +97,7 @@ static void at91sam9rlek_nand_hw_init(void) #else /* CFG_NAND_DBW_8 */ AT91_SMC_DBW_8 | #endif - AT91_SMC_TDF_(1)); + AT91_SMC_TDF_(2)); at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD); |