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authorStelian Pop <stelian@popies.net>2008-05-08 20:52:18 +0200
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-05-10 11:32:07 +0200
commitc1212b2f5c5ed440bf8e9ebc8e4fd7488858b935 (patch)
treee2fcdd66b196ab8260bebc6392553a4eabdddbb2 /board/atmel/at91sam9260ek
parentab52640fc01624e208424e527af0b7b3a5a65a12 (diff)
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AT91SAM9260EK: Handle 8 or 16 bit NAND
The Atmel boards can handle 8 or 16 bit NAND memories. This patch makes the support configurable in the board config header file (CFG_NAND_DBW_8 or CFG_NAND_DBW_16). Signed-off-by: Stelian Pop <stelian@popies.net> Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/atmel/at91sam9260ek')
-rw-r--r--board/atmel/at91sam9260ek/at91sam9260ek.c7
-rw-r--r--board/atmel/at91sam9260ek/nand.c3
2 files changed, 9 insertions, 1 deletions
diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c
index 21479ac..4635f0f 100644
--- a/board/atmel/at91sam9260ek/at91sam9260ek.c
+++ b/board/atmel/at91sam9260ek/at91sam9260ek.c
@@ -90,7 +90,12 @@ static void at91sam9260ek_nand_hw_init(void)
at91_sys_write(AT91_SMC_MODE(3),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
- AT91_SMC_DBW_8 | AT91_SMC_TDF_(2));
+#ifdef CFG_NAND_DBW_16
+ AT91_SMC_DBW_16 |
+#else /* CFG_NAND_DBW_8 */
+ AT91_SMC_DBW_8 |
+#endif
+ AT91_SMC_TDF_(2));
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC);
diff --git a/board/atmel/at91sam9260ek/nand.c b/board/atmel/at91sam9260ek/nand.c
index 7c1e6ab..9738f0f 100644
--- a/board/atmel/at91sam9260ek/nand.c
+++ b/board/atmel/at91sam9260ek/nand.c
@@ -68,6 +68,9 @@ static int at91sam9260ek_nand_ready(struct mtd_info *mtd)
int board_nand_init(struct nand_chip *nand)
{
nand->eccmode = NAND_ECC_SOFT;
+#ifdef CFG_NAND_DBW_16
+ nand->options = NAND_BUSWIDTH_16;
+#endif
nand->hwcontrol = at91sam9260ek_nand_hwcontrol;
nand->dev_ready = at91sam9260ek_nand_ready;
nand->chip_delay = 20;