* Patch by Nicolas Lacressonniere, 11 Jun 2003:

  Modifications for Atmel AT91RM9200DK ARM920T based development kit
  - Add Atmel DataFlash support for reading and writing.
  - Add possibility to boot a Linux from DataFlash with BOOTM command.
  - Add Flash detection on Atmel AT91RM9200DK
    (between Atmel AT49BV1614 and AT49BV1614A flashes)
  - Replace old Ethernet PHY layer functions
  - Change link address

* Patch by Frank Smith, 9 Jun 2003:
  use CRIT_EXCEPTION for machine check on 4xx

* Patch by Detlev Zundel, 13 Jun 2003:
  added implementation of the "carinfo" command in cmd_immap.c

1 files changed, 48 insertions, 41 deletions

diff --git a/board/at91rm9200dk/at91rm9200dk.c b/board/at91rm9200dk/at91rm9200dk.c
index 07def18..ffd9687 100644
--- a/board/at91rm9200dk/at91rm9200dk.c
+++ b/board/at91rm9200dk/at91rm9200dk.c
@@ -30,28 +30,35 @@
  * Miscelaneous platform dependent initialisations
  */
 
-int board_init(void)
-  {
-  DECLARE_GLOBAL_DATA_PTR;
+int board_init (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+
+	/* Enable Ctrlc */
+	console_init_f ();
+
+	/* Correct IRDA resistor problem */
+	/* Set PA23_TXD in Output */
+	(AT91PS_PIO) AT91C_BASE_PIOA->PIO_OER = AT91C_PA23_TXD2;
 
-    /* memory and cpu-speed are setup before relocation */
-    /* so we do _nothing_ here */
+	/* memory and cpu-speed are setup before relocation */
+	/* so we do _nothing_ here */
 
-    /* arch number of AT91RM9200DK-Board */
-    gd->bd->bi_arch_number = 251;
-    /* adress of boot parameters */
-    gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
+	/* arch number of AT91RM9200DK-Board */
+	gd->bd->bi_arch_number = 251;
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
-    return 0;
+	return 0;
 }
 
-int dram_init(void)
+int dram_init (void)
 {
-  DECLARE_GLOBAL_DATA_PTR;
+	DECLARE_GLOBAL_DATA_PTR;
 
-  gd->bd->bi_dram[0].start = PHYS_SDRAM;
-  gd->bd->bi_dram[0].size  = PHYS_SDRAM_SIZE;
-  return 0;
+	gd->bd->bi_dram[0].start = PHYS_SDRAM;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+	return 0;
 }
 
 /*
@@ -59,47 +66,47 @@ int dram_init(void)
  * The NAND lives in the CS2* space
  */
 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
-extern void
-nand_probe(ulong physadr);
+extern void nand_probe (ulong physadr);
 
-#define AT91_SMARTMEDIA_BASE 0x40000000  /* physical address to access memory on NCS3 */
-void
-nand_init(void)
+#define AT91_SMARTMEDIA_BASE 0x40000000	/* physical address to access memory on NCS3 */
+void nand_init (void)
 {
 	/* Setup Smart Media, fitst enable the address range of CS3 */
-        *AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
-        /* set the bus interface characteristics based on
-           tDS Data Set up Time 30 - ns
-           tDH Data Hold Time 20 - ns
-           tALS ALE Set up Time 20 - ns
-           16ns at 60 MHz ~= 3  */
+	*AT91C_EBI_CSA |= AT91C_EBI_CS3A_SMC_SmartMedia;
+	/* set the bus interface characteristics based on
+	   tDS Data Set up Time 30 - ns
+	   tDH Data Hold Time 20 - ns
+	   tALS ALE Set up Time 20 - ns
+	   16ns at 60 MHz ~= 3  */
 /*memory mapping structures */
 #define SM_ID_RWH	(5 << 28)
 #define SM_RWH		(1 << 28)
 #define SM_RWS		(0 << 24)
 #define SM_TDF		(1 << 8)
 #define SM_NWS		(3)
-        AT91C_BASE_SMC2->SMC2_CSR[3] = ( SM_RWH|SM_RWS | AT91C_SMC2_ACSS_STANDARD |
-                                         AT91C_SMC2_DBW_8 | SM_TDF |
-                                         AT91C_SMC2_WSEN | SM_NWS);
+	AT91C_BASE_SMC2->SMC2_CSR[3] = (SM_RWH | SM_RWS |
+		AT91C_SMC2_ACSS_STANDARD | AT91C_SMC2_DBW_8 |
+		SM_TDF | AT91C_SMC2_WSEN | SM_NWS);
 
-        /* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
-        *AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE;
-        *AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE | AT91C_PC3_BFBAA_SMWE;
+	/* enable the SMOE line PC0=SMCE, A21=CLE, A22=ALE */
+	*AT91C_PIOC_ASR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
+		AT91C_PC3_BFBAA_SMWE;
+	*AT91C_PIOC_PDR = AT91C_PC0_BFCK | AT91C_PC1_BFRDY_SMOE |
+		AT91C_PC3_BFBAA_SMWE;
 
 	/* Configure PC2 as input (signal READY of the SmartMedia) */
-        *AT91C_PIOC_PER = AT91C_PC2_BFAVD;  /* enable direct output enable */
-        *AT91C_PIOC_ODR = AT91C_PC2_BFAVD;  /* disable output */
+	*AT91C_PIOC_PER = AT91C_PC2_BFAVD;	/* enable direct output enable */
+	*AT91C_PIOC_ODR = AT91C_PC2_BFAVD;	/* disable output */
 
 	/* Configure PB1 as input (signal Card Detect of the SmartMedia) */
-        *AT91C_PIOB_PER = AT91C_PIO_PB1;  /* enable direct output enable */
-        *AT91C_PIOB_ODR = AT91C_PIO_PB1;  /* disable output */
+	*AT91C_PIOB_PER = AT91C_PIO_PB1;	/* enable direct output enable */
+	*AT91C_PIOB_ODR = AT91C_PIO_PB1;	/* disable output */
 
-        if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
-          printf ("No ");
-        printf ("SmartMedia card inserted\n");
+	if (*AT91C_PIOB_PDSR & AT91C_PIO_PB1)
+		printf ("No ");
+	printf ("SmartMedia card inserted\n");
 
-	printf("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
-	nand_probe(AT91_SMARTMEDIA_BASE);
+	printf ("Probing at 0x%.8x\n", AT91_SMARTMEDIA_BASE);
+	nand_probe (AT91_SMARTMEDIA_BASE);
 }
 #endif