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| author | Liviu Dudau <Liviu.Dudau@foss.arm.com> | 2016-11-22 11:19:18 +0000 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-11-29 08:15:30 -0500 |
| commit | 88e0d59315f4863537a94f12ef48348764f4316b (patch) | |
| tree | a3acba3ee3bdd0216b7d33c972e914dcd695a46c /board/armltd | |
| parent | 1bcf7a30d81b0f770cb217dedef8e4034da9d87d (diff) | |
| download | u-boot-imx-88e0d59315f4863537a94f12ef48348764f4316b.zip u-boot-imx-88e0d59315f4863537a94f12ef48348764f4316b.tar.gz u-boot-imx-88e0d59315f4863537a94f12ef48348764f4316b.tar.bz2 | |
vexpress64: Juno: Change PCI buss addresses for IO to start from zero.
Juno uses a 1:1 mapping between CPU and PCI addresses for IO. First,
that will trip devices that cannot use more than 16 bits of addresses
for IO, second it is un-necessary as the system can handle zero-based
PCI addresses just fine.
Change the mapping to start IO bus addresses from zero.
Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>
Diffstat (limited to 'board/armltd')
| -rw-r--r-- | board/armltd/vexpress64/pcie.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/armltd/vexpress64/pcie.c b/board/armltd/vexpress64/pcie.c index b3fb09c..0608a5a 100644 --- a/board/armltd/vexpress64/pcie.c +++ b/board/armltd/vexpress64/pcie.c @@ -123,7 +123,7 @@ void xr3pci_setup_atr(void) base += XR3PCI_ATR_TABLE_SIZE; /* setup IO space translation */ - xr3pci_set_atr_entry(base, XR3_PCI_IOSPACE_START, XR3_PCI_IOSPACE_START, + xr3pci_set_atr_entry(base, XR3_PCI_IOSPACE_START, 0, XR3_PCI_IOSPACE_SIZE, XR3PCI_ATR_TRSLID_PCIE_IO); base += XR3PCI_ATR_TABLE_SIZE; |