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author | Ryan Harkin <ryan.harkin@linaro.org> | 2015-11-18 10:39:07 +0000 |
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committer | Tom Rini <trini@konsulko.com> | 2015-11-21 21:50:28 -0500 |
commit | 2c2b218383f05be51e1bd5f5982a44b969c4b5a6 (patch) | |
tree | 36a740c66c2250877bf4c58f435a0b6d4859b9f4 /board/armltd/vexpress64 | |
parent | bc8d3bc0233df4f72172ae1552c8fa55e83538f8 (diff) | |
download | u-boot-imx-2c2b218383f05be51e1bd5f5982a44b969c4b5a6.zip u-boot-imx-2c2b218383f05be51e1bd5f5982a44b969c4b5a6.tar.gz u-boot-imx-2c2b218383f05be51e1bd5f5982a44b969c4b5a6.tar.bz2 |
vexpress64: use 2nd DRAM bank only on juno
This patch makes the 2nd DRAM bank available on Juno only and not on
other vexpress64 targets, eg. the FVP models.
The commit below added a 2nd bank of NOR flash for Juno, but also for
all vexpress64 targets:
commit 2d0cee1ca2b9d977fa3214896bb2e30cfec77059
Author: Liviu Dudau <Liviu.Dudau@foss.arm.com>
Date: Mon Oct 19 11:08:31 2015 +0100
vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.
Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
Declare a secondary memory bank and set the sizes correctly.
Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation
model. Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot
the kernel.
Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Acked-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'board/armltd/vexpress64')
-rw-r--r-- | board/armltd/vexpress64/vexpress64.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/board/armltd/vexpress64/vexpress64.c b/board/armltd/vexpress64/vexpress64.c index 3add099..6efc8c1 100644 --- a/board/armltd/vexpress64/vexpress64.c +++ b/board/armltd/vexpress64/vexpress64.c @@ -51,8 +51,10 @@ void dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; +#ifdef PHYS_SDRAM_2 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; +#endif } /* |