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authorYe Li <ye.li@nxp.com>2017-02-14 13:53:50 +0800
committerYe Li <ye.li@nxp.com>2017-02-15 10:04:14 +0800
commit998f422f28f16b4fcbb61e486ee544d40e26a943 (patch)
treee5a03d88746daa5522dd333cad3dd4b9d8ab40ae /board/armadeus
parente3343cb38eac2cc69b58247b5adcb500e5f19834 (diff)
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MLK-13925-2 mx7ulp_arm2: Update LPDDR3/LPDDR2 script to latest version
Update LPDDR3 script from v1.3 to v1.5 IMX7ULP1_LPDDR3_320MHz_512MB_32bit_V1.5.inc with changes: Version 1.4 -update the precharge command to CMD=01 at DDR initializaiton phase Version 1.5 -remove unimplemented registers Write data bit delay --refer to the DDR_TRIM bits in IOMUXC1_DDR_SW_PAD_CTL_PAD_DDRn Update LPDDR2 script from v1.0 to v1.1 IMX7ULP1_LPDDR2_320MHz_1GB_32bit_V1.1.inc with changes: Version 1.1 -remove unimplemented registers Write data bit delay --refer to the DDR_TRIM bits in IOMUXC1_DDR_SW_PAD_CTL_PAD_DDRn Files: http://compass.freescale.net/livelink/livelink?func=ll&objid=235761218&objAction=browse&sort=name&viewType=1 Test: No test for ARM2 board. Signed-off-by: Ye Li <ye.li@nxp.com>
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