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| author | Peng Fan <Peng.Fan@freescale.com> | 2015-08-12 17:46:50 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2015-09-02 15:29:14 +0200 |
| commit | 6d97dc10a81062a787fcf5e5df7b88d1ea122a64 (patch) | |
| tree | a817e1d0a39138fcaed73168422db7b83aa80eff /board/aristainetos | |
| parent | fc684e87a1d1342cecbaf68ad8690482e4baff76 (diff) | |
| download | u-boot-imx-6d97dc10a81062a787fcf5e5df7b88d1ea122a64.zip u-boot-imx-6d97dc10a81062a787fcf5e5df7b88d1ea122a64.tar.gz u-boot-imx-6d97dc10a81062a787fcf5e5df7b88d1ea122a64.tar.bz2 | |
imx: clock support enet2 anatop clock support
To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
To value 1, only i.MX6SX/UL can pass the check.
2. Modify board code who use this api to follow new api prototype.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/aristainetos')
| -rw-r--r-- | board/aristainetos/aristainetos-v1.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/aristainetos/aristainetos-v1.c b/board/aristainetos/aristainetos-v1.c index d6a7614..b8fed2e 100644 --- a/board/aristainetos/aristainetos-v1.c +++ b/board/aristainetos/aristainetos-v1.c @@ -185,7 +185,7 @@ int board_eth_init(bd_t *bis) /* clear gpr1[14], gpr1[18:17] to select anatop clock */ clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC_MASK, 0); - ret = enable_fec_anatop_clock(ENET_50MHZ); + ret = enable_fec_anatop_clock(0, ENET_50MHZ); if (ret) return ret; |