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authorPeter Pearse <peter.pearse@arm.com>2007-11-15 08:45:13 +0000
committerPeter Pearse <peter.pearse@arm.com>2007-11-15 08:45:13 +0000
commit2db916e14410e3ec1738508c7bf4dfeb2b299ae7 (patch)
treeeaa4610ac316473776e51a96fac09c2c008824f9 /board/apollon/mem.h
parentdd28e10d9429fcc8ffb532698bda8f3ead674d96 (diff)
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Correction patch
Diffstat (limited to 'board/apollon/mem.h')
-rw-r--r--board/apollon/mem.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/board/apollon/mem.h b/board/apollon/mem.h
index aed7e1d..5bc96fa 100644
--- a/board/apollon/mem.h
+++ b/board/apollon/mem.h
@@ -44,15 +44,15 @@
#define APOLLON_242x_SDRC_DLLAB_CTRL_166MHz 0x00000506
#ifdef PRCM_CONFIG_I
-# define APOLLON_2420_SDRC_ACTIM_CTRLA_0 APOLLON_242X_SDRC_ACTIM_CTRLA_0_166MHz
-# define APOLLON_2420_SDRC_ACTIM_CTRLB_0 APOLLON_242X_SDRC_ACTIM_CTRLB_0_166MHz
-# define APOLLON_2420_SDRC_RFR_CTRL APOLLON_242X_SDRC_RFR_CTRL_166MHz
-# define APOLLON_2420_SDRC_DLLAB_CTRL APOLLON_242x_SDRC_DLLAB_CTRL_166MHz
+#define APOLLON_2420_SDRC_ACTIM_CTRLA_0 APOLLON_242X_SDRC_ACTIM_CTRLA_0_166MHz
+#define APOLLON_2420_SDRC_ACTIM_CTRLB_0 APOLLON_242X_SDRC_ACTIM_CTRLB_0_166MHz
+#define APOLLON_2420_SDRC_RFR_CTRL APOLLON_242X_SDRC_RFR_CTRL_166MHz
+#define APOLLON_2420_SDRC_DLLAB_CTRL APOLLON_242x_SDRC_DLLAB_CTRL_166MHz
#elif PRCM_CONFIG_II
-# define APOLLON_2420_SDRC_ACTIM_CTRLA_0 APOLLON_242X_SDRC_ACTIM_CTRLA_0_100MHz
-# define APOLLON_2420_SDRC_ACTIM_CTRLB_0 APOLLON_242X_SDRC_ACTIM_CTRLB_0_100MHz
-# define APOLLON_2420_SDRC_RFR_CTRL APOLLON_242X_SDRC_RFR_CTRL_100MHz
-# define APOLLON_2420_SDRC_DLLAB_CTRL APOLLON_242x_SDRC_DLLAB_CTRL_100MHz
+#define APOLLON_2420_SDRC_ACTIM_CTRLA_0 APOLLON_242X_SDRC_ACTIM_CTRLA_0_100MHz
+#define APOLLON_2420_SDRC_ACTIM_CTRLB_0 APOLLON_242X_SDRC_ACTIM_CTRLB_0_100MHz
+#define APOLLON_2420_SDRC_RFR_CTRL APOLLON_242X_SDRC_RFR_CTRL_100MHz
+#define APOLLON_2420_SDRC_DLLAB_CTRL APOLLON_242x_SDRC_DLLAB_CTRL_100MHz
#endif
/* GPMC settings */