ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

11 files changed, 11 insertions, 11 deletions

diff --git a/board/amcc/acadia/u-boot-nand.lds b/board/amcc/acadia/u-boot-nand.lds
index 738caa0..bfca582 100644
--- a/board/amcc/acadia/u-boot-nand.lds
+++ b/board/amcc/acadia/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     /* Align to next NAND block */
     . = ALIGN(0x4000);
diff --git a/board/amcc/bamboo/u-boot-nand.lds b/board/amcc/bamboo/u-boot-nand.lds
index 738caa0..bfca582 100644
--- a/board/amcc/bamboo/u-boot-nand.lds
+++ b/board/amcc/bamboo/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     /* Align to next NAND block */
     . = ALIGN(0x4000);
diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c
index 13a0dac..71a5701 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define BOARD_ARCHES		4
 
 /*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with
  * board specific values.
  */
 #if defined(CONFIG_ARCHES)
diff --git a/board/amcc/canyonlands/u-boot-nand.lds b/board/amcc/canyonlands/u-boot-nand.lds
index 47c6bd9..b04b05e 100644
--- a/board/amcc/canyonlands/u-boot-nand.lds
+++ b/board/amcc/canyonlands/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     /* Align to next NAND block */
     . = ALIGN(0x20000);
diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c
index 54e2a39..15291f9 100644
--- a/board/amcc/katmai/katmai.c
+++ b/board/amcc/katmai/katmai.c
@@ -249,7 +249,7 @@ int checkboard (void)
 }
 
 /*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with
  * board specific values.
  */
 u32 ddr_wrdtr(u32 default_val) {
diff --git a/board/amcc/kilauea/u-boot-nand.lds b/board/amcc/kilauea/u-boot-nand.lds
index 738caa0..bfca582 100644
--- a/board/amcc/kilauea/u-boot-nand.lds
+++ b/board/amcc/kilauea/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     /* Align to next NAND block */
     . = ALIGN(0x4000);
diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
index 332d170..6542565 100644
--- a/board/amcc/luan/luan.c
+++ b/board/amcc/luan/luan.c
@@ -119,7 +119,7 @@ int checkboard(void)
 }
 
 /*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with
  * board specific values.
  */
 u32 ddr_clktr(u32 default_val) {
diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c
index bde471c..b5c7d6d 100644
--- a/board/amcc/sequoia/sdram.c
+++ b/board/amcc/sequoia/sdram.c
@@ -40,7 +40,7 @@ extern int denali_wait_for_dlllock(void);
 extern void denali_core_search_data_eye(void);
 
 #if defined(CONFIG_NAND_SPL)
-/* Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big
+/* Using arch/ppc/cpu/ppc4xx/speed.c to calculate the bus frequency is too big
  * for the 4k NAND boot image so define bus_frequency to 133MHz here
  * which is save for the refresh counter setup.
  */
diff --git a/board/amcc/sequoia/u-boot-nand.lds b/board/amcc/sequoia/u-boot-nand.lds
index fb629e0..8a71bfa 100644
--- a/board/amcc/sequoia/u-boot-nand.lds
+++ b/board/amcc/sequoia/u-boot-nand.lds
@@ -53,7 +53,7 @@ SECTIONS
     /* WARNING - the following is hand-optimized to fit within	*/
     /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     /* Align to next NAND block */
     . = ALIGN(0x4000);
diff --git a/board/amcc/sequoia/u-boot-ram.lds b/board/amcc/sequoia/u-boot-ram.lds
index e22dbec..c6a321e 100644
--- a/board/amcc/sequoia/u-boot-ram.lds
+++ b/board/amcc/sequoia/u-boot-ram.lds
@@ -50,7 +50,7 @@ SECTIONS
   .plt : { *(.plt) }
   .text      :
   {
-    cpu/ppc4xx/start.o	(.text)
+    arch/ppc/cpu/ppc4xx/start.o	(.text)
 
     *(.text)
     *(.got1)
diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c
index 8c65cfb..241f484 100644
--- a/board/amcc/yucca/yucca.c
+++ b/board/amcc/yucca/yucca.c
@@ -555,7 +555,7 @@ int checkboard (void)
 }
 
 /*
- * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * Override the default functions in arch/ppc/cpu/ppc4xx/44x_spd_ddr2.c with
  * board specific values.
  */
 static int ppc440spe_rev_a(void)