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authorStefan Roese <sr@denx.de>2008-03-19 16:20:49 +0100
committerStefan Roese <sr@denx.de>2008-03-27 09:54:41 +0100
commit4c9e855734c523900322a7c3cdd9099b4f51b51d (patch)
tree2701c888929cf2559477fd63c03eaf23648d81a9 /board/amcc
parentd8bd643141af4710d7f1b69bbab6b760de0af0a1 (diff)
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ppc4xx: Add AMCC Glacier 406GT eval board support
This patch adds support for the AMCC Glacier 460GT eval board. The main difference to the Canyonlands board are listed here: - 4 ethernet ports instead of 2 - no SATA port - no USB port Currently EMAC2+3 are not working. This will be fixed in a later release. Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc')
-rw-r--r--board/amcc/canyonlands/canyonlands.c25
1 files changed, 16 insertions, 9 deletions
diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c
index 36779f5..fa3ae85 100644
--- a/board/amcc/canyonlands/canyonlands.c
+++ b/board/amcc/canyonlands/canyonlands.c
@@ -35,6 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
int board_early_init_f(void)
{
u32 sdr0_cust0;
+ u32 pvr = get_pvr();
/*------------------------------------------------------------------+
* Setup the interrupt controller polarities, triggers, etc.
@@ -105,14 +106,16 @@ int board_early_init_f(void)
mtdcr(AHB_TOP, 0x8000004B);
mtdcr(AHB_BOT, 0x8000004B);
- /*
- * Configure USB-STP pins as alternate and not GPIO
- * It seems to be neccessary to configure the STP pins as GPIO
- * input at powerup (perhaps while USB reset is asserted). So
- * we configure those pins to their "real" function now.
- */
- gpio_config(16, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
- gpio_config(19, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
+ if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA)) {
+ /*
+ * Configure USB-STP pins as alternate and not GPIO
+ * It seems to be neccessary to configure the STP pins as GPIO
+ * input at powerup (perhaps while USB reset is asserted). So
+ * we configure those pins to their "real" function now.
+ */
+ gpio_config(16, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
+ gpio_config(19, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1);
+ }
return 0;
}
@@ -369,6 +372,7 @@ int misc_init_r(void)
{
u32 sdr0_srst1 = 0;
u32 eth_cfg;
+ u32 pvr = get_pvr();
/*
* Set EMAC mode/configuration (GMII, SGMII, RGMII...).
@@ -382,7 +386,10 @@ int misc_init_r(void)
/* Set the for 2 RGMII mode */
/* GMC0 EMAC4_0, GMC0 EMAC4_1, RGMII Bridge 0 */
eth_cfg &= ~SDR0_ETH_CFG_GMC0_BRIDGE_SEL;
- eth_cfg |= SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
+ if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA))
+ eth_cfg |= SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
+ else
+ eth_cfg &= ~SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
mtsdr(SDR0_ETH_CFG, eth_cfg);
/*