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| author | Stefan Roese <sr@denx.de> | 2009-07-27 07:42:48 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2009-07-28 07:24:01 +0200 |
| commit | 11a1604f8d0a8d936b42f6435d004b4aa33a5d87 (patch) | |
| tree | c161b9c4bc4243d55d77d603553419029cee2293 /board/amcc | |
| parent | 5b34691ff87821891375b28ec5bcf5154575a735 (diff) | |
| download | u-boot-imx-11a1604f8d0a8d936b42f6435d004b4aa33a5d87.zip u-boot-imx-11a1604f8d0a8d936b42f6435d004b4aa33a5d87.tar.gz u-boot-imx-11a1604f8d0a8d936b42f6435d004b4aa33a5d87.tar.bz2 | |
ppc4xx: Add some NAND-booting bootstrap entries to Kilauea chip_config cmd
This patch adds some I2C bootstrap setting for NAND booting to the Kilauea
chip_config command ("533-nand" and "600-nand").
Additionally some incorrectly indented lines are fixed.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc')
| -rw-r--r-- | board/amcc/kilauea/chip_config.c | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/board/amcc/kilauea/chip_config.c b/board/amcc/kilauea/chip_config.c index 9a3fc15..919ec7f 100644 --- a/board/amcc/kilauea/chip_config.c +++ b/board/amcc/kilauea/chip_config.c @@ -25,6 +25,8 @@ #include <common.h> #include <asm/ppc4xx_config.h> +/* NAND booting versions differ in bytes: 6, 8, 9, 11, 12 */ + struct ppc4xx_config ppc4xx_config_val[] = { { "333-nor","NOR CPU: 333 PLB: 166 OPB: 83 EBC: 83", @@ -49,10 +51,17 @@ struct ppc4xx_config ppc4xx_config_val[] = { }, { "533-nor", "NOR CPU: 533 PLB: 177 OPB: 88 EBC: 88", - { - 0x8e, 0x43, 0x60, 0x13, 0x98, 0x00, 0x0a, 0x00, - 0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00 - } + { + 0x8e, 0x43, 0x60, 0x13, 0x98, 0x00, 0x0a, 0x00, + 0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00 + } + }, + { + "533-nand", "NOR CPU: 533 PLB: 177 OPB: 88 EBC: 88", + { + 0x8e, 0x43, 0x60, 0x13, 0x98, 0x00, 0x0f, 0x00, + 0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 + } }, { "600-nor", "NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100", @@ -62,6 +71,13 @@ struct ppc4xx_config ppc4xx_config_val[] = { } }, { + "600-nand", "NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100", + { + 0x8d, 0x02, 0x34, 0x13, 0x98, 0x00, 0x0f, 0x00, + 0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 + } + }, + { "666-nor", "NOR CPU: 666 PLB: 222 OPB: 111 EBC: 111", { 0x8d, 0x03, 0x78, 0x13, 0x98, 0x00, 0x0a, 0x00, |