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| author | <m8@hekate.semihalf.com> | 2005-08-12 15:33:33 +0200 |
|---|---|---|
| committer | <m8@hekate.semihalf.com> | 2005-08-12 15:33:33 +0200 |
| commit | 6df6d38d2d59ba2964e9ee33aa559707a6c1c4b7 (patch) | |
| tree | bac8690410f0c5dba55f940d0bb403029459cdae /board/amcc/yosemite/init.S | |
| parent | 5a27f84855f3db8a6317389c034f8f507444185f (diff) | |
| parent | dafba16e6fc1837381c8e74c4891ad6965cf54ab (diff) | |
| download | u-boot-imx-6df6d38d2d59ba2964e9ee33aa559707a6c1c4b7.zip u-boot-imx-6df6d38d2d59ba2964e9ee33aa559707a6c1c4b7.tar.gz u-boot-imx-6df6d38d2d59ba2964e9ee33aa559707a6c1c4b7.tar.bz2 | |
Merge with pollux.denx.org:/home/git/u-boot/.git
Diffstat (limited to 'board/amcc/yosemite/init.S')
| -rw-r--r-- | board/amcc/yosemite/init.S | 21 |
1 files changed, 13 insertions, 8 deletions
diff --git a/board/amcc/yosemite/init.S b/board/amcc/yosemite/init.S index 7ba43c7..425ad08 100644 --- a/board/amcc/yosemite/init.S +++ b/board/amcc/yosemite/init.S @@ -86,14 +86,19 @@ tlbtab: tlbtab_start - /* - 0xf0000000 must be first, before relocation SA_I must be off to use the - dcache as stack. It is patched after relocation to enable SA_I - */ - tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/) - tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) - tlbentry( CFG_PCI_BASE, SZ_256M, 0xE0000000, 0, AC_R|AC_W|SA_G|SA_I ) - tlbentry( CFG_NVRAM_BASE_ADDR, SZ_16K, 0x80000000, 0, AC_R|AC_W|AC_X|SA_W|SA_I ) + + /* + * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the + * speed up boot process. It is patched after relocation to enable SA_I + */ + tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/) + + /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ + tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G ) + + tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I ) + tlbentry( CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I ) + tlbentry( CFG_NVRAM_BASE_ADDR, SZ_256M, CFG_NVRAM_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I ) /* PCI */ tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I ) |