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author | Stefan Roese <sr@denx.de> | 2007-01-13 07:59:56 +0100 |
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committer | Stefan Roese <sr@denx.de> | 2007-01-13 07:59:56 +0100 |
commit | 77ddc5b9afb325262fd88752ba430a1dded1f0c7 (patch) | |
tree | 4b7bef5c035ba1628645a267c4e10037d8c5b984 /board/amcc/yellowstone/yellowstone.c | |
parent | 36adff362c2c0141ff8a810d42a7e478f779130f (diff) | |
download | u-boot-imx-77ddc5b9afb325262fd88752ba430a1dded1f0c7.zip u-boot-imx-77ddc5b9afb325262fd88752ba430a1dded1f0c7.tar.gz u-boot-imx-77ddc5b9afb325262fd88752ba430a1dded1f0c7.tar.bz2 |
[PATCH] Update Yellowstone (440GR) to display board rev and PCI bus speed
Now the board revision and the current PCI bus speed are printed after
the board message.
Also the EBC initialising is now done via defines in the board config
file.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/amcc/yellowstone/yellowstone.c')
-rw-r--r-- | board/amcc/yellowstone/yellowstone.c | 25 |
1 files changed, 7 insertions, 18 deletions
diff --git a/board/amcc/yellowstone/yellowstone.c b/board/amcc/yellowstone/yellowstone.c index 754ae44..04f58e0 100644 --- a/board/amcc/yellowstone/yellowstone.c +++ b/board/amcc/yellowstone/yellowstone.c @@ -39,24 +39,6 @@ int board_early_init_f(void) reg = mfdcr(ebccfgd); mtdcr(ebccfgd, reg | 0x04000000); /* Set ATC */ - mtebc(pb0ap, 0x03017300); /* FLASH/SRAM */ - mtebc(pb0cr, 0xfc0da000); /* BAS=0xfc0 64MB r/w 16-bit */ - - mtebc(pb1ap, 0x00000000); - mtebc(pb1cr, 0x00000000); - - mtebc(pb2ap, 0x04814500); - /*CPLD*/ mtebc(pb2cr, 0x80018000); /*BAS=0x800 1MB r/w 8-bit */ - - mtebc(pb3ap, 0x00000000); - mtebc(pb3cr, 0x00000000); - - mtebc(pb4ap, 0x00000000); - mtebc(pb4cr, 0x00000000); - - mtebc(pb5ap, 0x00000000); - mtebc(pb5cr, 0x00000000); - /*-------------------------------------------------------------------- * Setup the GPIO pins *-------------------------------------------------------------------*/ @@ -190,8 +172,15 @@ int misc_init_r (void) int checkboard(void) { char *s = getenv("serial#"); + u8 rev; + u8 val; printf("Board: Yellowstone - AMCC PPC440GR Evaluation Board"); + + rev = *(u8 *)(CFG_CPLD + 0); + val = *(u8 *)(CFG_CPLD + 5) & 0x01; + printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33); + if (s != NULL) { puts(", serial# "); puts(s); |