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| author | Wolfgang Denk <wd@denx.de> | 2007-05-05 18:07:10 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2007-05-05 18:07:10 +0200 |
| commit | f51697316ad53e99bf1be354964dacd9fed72a04 (patch) | |
| tree | 5f52ed462a3a7ec90fa350f6ccf7112717a72f7f /board/amcc/sequoia | |
| parent | 885ec89b648a899a2f32393fd3ffd9f7234c4402 (diff) | |
| parent | beb7dba2f50edf5c312168c33137598b9e5ffb99 (diff) | |
| download | u-boot-imx-f51697316ad53e99bf1be354964dacd9fed72a04.zip u-boot-imx-f51697316ad53e99bf1be354964dacd9fed72a04.tar.gz u-boot-imx-f51697316ad53e99bf1be354964dacd9fed72a04.tar.bz2 | |
Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xx
Diffstat (limited to 'board/amcc/sequoia')
| -rw-r--r-- | board/amcc/sequoia/sdram.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c index f8b837e..d045df1 100644 --- a/board/amcc/sequoia/sdram.c +++ b/board/amcc/sequoia/sdram.c @@ -371,6 +371,14 @@ void denali_core_search_data_eye(unsigned long memory_size) } #endif /* CONFIG_DDR_DATA_EYE */ +#if defined(CONFIG_NAND_SPL) +/* Using cpu/ppc4xx/speed.c to calculate the bus frequency is too big + * for the 4k NAND boot image so define bus_frequency to 133MHz here + * which is save for the refresh counter setup. + */ +#define get_bus_freq(val) 133000000 +#endif + /************************************************************************* * * initdram -- 440EPx's DDR controller is a DENALI Core @@ -404,7 +412,7 @@ long int initdram (int board_type) mtsdram(DDR0_22, 0x00267F0B); mtsdram(DDR0_23, 0x00000000); mtsdram(DDR0_24, 0x01010002); - if (speed > 133333333) + if (speed > 133333334) mtsdram(DDR0_26, 0x5B26050C); else mtsdram(DDR0_26, 0x5B260408); |