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authorLawrence R. Johnson <lrj@acm.org>2008-01-04 02:11:56 -0500
committerStefan Roese <sr@denx.de>2008-01-04 11:39:05 +0100
commitb05e8bf58be9d8956fdfde3d8c8e87c140414663 (patch)
tree8aefcfff0b2269bdd8754146de348c7591d77055 /board/amcc/sequoia/sequoia.c
parent5ab884b254ca2e707ab50545cd705f30108cf491 (diff)
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ppc4xx: Use CFG_4xx_GPIO_TABLE to configure Sequoia board
Note: this patch changes the configuration of some GPIO registers: Register Old Value New Value --------------- ---------- ---------- DCR GPIO0_TCR 0x0000000F 0x0000F0CF DCR GPIO0_TSRH 0x55005000 0x00000000 DCR GPIO1_TCR 0xC2000000 0xE2000000 DCR GPIO1_TSRL 0x0C000000 0x00200000 DCR GPIO1_ISR2L 0x00050000 0x00110000 Signed-off-by: Larry Johnson <lrj@acm.org>
Diffstat (limited to 'board/amcc/sequoia/sequoia.c')
-rw-r--r--board/amcc/sequoia/sequoia.c31
1 files changed, 1 insertions, 30 deletions
diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c
index 37b4f31..2268bc0 100644
--- a/board/amcc/sequoia/sequoia.c
+++ b/board/amcc/sequoia/sequoia.c
@@ -26,6 +26,7 @@
#include <libfdt.h>
#include <fdt_support.h>
#include <ppc440.h>
+#include <asm/gpio.h>
#include <asm/processor.h>
#include <asm/io.h>
@@ -45,36 +46,6 @@ int board_early_init_f(void)
mtdcr(ebccfgd, 0xb8400000);
/*--------------------------------------------------------------------
- * Setup the GPIO pins
- *-------------------------------------------------------------------*/
- /* test-only: take GPIO init from pcs440ep ???? in config file */
- out_be32((u32 *) GPIO0_OR, 0x00000000);
- out_be32((u32 *) GPIO0_TCR, 0x0000000f);
- out_be32((u32 *) GPIO0_OSRL, 0x50015400);
- out_be32((u32 *) GPIO0_OSRH, 0x550050aa);
- out_be32((u32 *) GPIO0_TSRL, 0x50015400);
- out_be32((u32 *) GPIO0_TSRH, 0x55005000);
- out_be32((u32 *) GPIO0_ISR1L, 0x50000000);
- out_be32((u32 *) GPIO0_ISR1H, 0x00000000);
- out_be32((u32 *) GPIO0_ISR2L, 0x00000000);
- out_be32((u32 *) GPIO0_ISR2H, 0x00000100);
- out_be32((u32 *) GPIO0_ISR3L, 0x00000000);
- out_be32((u32 *) GPIO0_ISR3H, 0x00000000);
-
- out_be32((u32 *) GPIO1_OR, 0x00000000);
- out_be32((u32 *) GPIO1_TCR, 0xc2000000);
- out_be32((u32 *) GPIO1_OSRL, 0x5c280000);
- out_be32((u32 *) GPIO1_OSRH, 0x00000000);
- out_be32((u32 *) GPIO1_TSRL, 0x0c000000);
- out_be32((u32 *) GPIO1_TSRH, 0x00000000);
- out_be32((u32 *) GPIO1_ISR1L, 0x00005550);
- out_be32((u32 *) GPIO1_ISR1H, 0x00000000);
- out_be32((u32 *) GPIO1_ISR2L, 0x00050000);
- out_be32((u32 *) GPIO1_ISR2H, 0x00000000);
- out_be32((u32 *) GPIO1_ISR3L, 0x01400000);
- out_be32((u32 *) GPIO1_ISR3H, 0x00000000);
-
- /*--------------------------------------------------------------------
* Setup the interrupt controller polarities, triggers, etc.
*-------------------------------------------------------------------*/
mtdcr(uic0sr, 0xffffffff); /* clear all */