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authorHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2008-12-17 16:53:07 +0100
committerHaavard Skinnemoen <haavard.skinnemoen@atmel.com>2008-12-17 16:53:07 +0100
commitcb5473205206c7f14cbb1e747f28ec75b48826e2 (patch)
tree8f4808d60917100b18a10b05230f7638a0a9bbcc /board/amcc/ocotea/ocotea.c
parentbaf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff)
parent92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff)
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Merge branch 'fixes' into cleanups
Conflicts: board/atmel/atngw100/atngw100.c board/atmel/atstk1000/atstk1000.c cpu/at32ap/at32ap700x/gpio.c include/asm-avr32/arch-at32ap700x/clk.h include/configs/atngw100.h include/configs/atstk1002.h include/configs/atstk1003.h include/configs/atstk1004.h include/configs/atstk1006.h include/configs/favr-32-ezkit.h include/configs/hammerhead.h include/configs/mimc200.h
Diffstat (limited to 'board/amcc/ocotea/ocotea.c')
-rw-r--r--board/amcc/ocotea/ocotea.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c
index 4d1d093..fe45408 100644
--- a/board/amcc/ocotea/ocotea.c
+++ b/board/amcc/ocotea/ocotea.c
@@ -42,7 +42,7 @@ void fpga_init (void);
int board_early_init_f (void)
{
unsigned long mfr;
- unsigned char *fpga_base = (unsigned char *) CFG_FPGA_BASE;
+ unsigned char *fpga_base = (unsigned char *) CONFIG_SYS_FPGA_BASE;
unsigned char switch_status;
unsigned long cs0_base;
unsigned long cs0_size;
@@ -315,7 +315,7 @@ int pci_pre_init(struct pci_controller * hose )
* may not be sufficient for a given board.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
+#if defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
/*--------------------------------------------------------------------------+
@@ -330,7 +330,7 @@ void pci_target_init(struct pci_controller * hose )
* Map all of SDRAM to PCI address 0x0000_0000. Note that the 440 strapping
* options to not support sizes such as 128/256 MB.
*--------------------------------------------------------------------------*/
- out32r( PCIX0_PIM0LAL, CFG_SDRAM_BASE );
+ out32r( PCIX0_PIM0LAL, CONFIG_SYS_SDRAM_BASE );
out32r( PCIX0_PIM0LAH, 0 );
out32r( PCIX0_PIM0SA, ~(gd->ram_size - 1) | 1 );
@@ -339,12 +339,12 @@ void pci_target_init(struct pci_controller * hose )
/*--------------------------------------------------------------------------+
* Program the board's subsystem id/vendor id
*--------------------------------------------------------------------------*/
- out16r( PCIX0_SBSYSVID, CFG_PCI_SUBSYS_VENDORID );
- out16r( PCIX0_SBSYSID, CFG_PCI_SUBSYS_DEVICEID );
+ out16r( PCIX0_SBSYSVID, CONFIG_SYS_PCI_SUBSYS_VENDORID );
+ out16r( PCIX0_SBSYSID, CONFIG_SYS_PCI_SUBSYS_DEVICEID );
out16r( PCIX0_CMD, in16r(PCIX0_CMD) | PCI_COMMAND_MEMORY );
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
+#endif /* defined(CONFIG_PCI) && defined(CONFIG_SYS_PCI_TARGET_INIT) */
/*************************************************************************